A Fast Charge Pump PLL Using a Bang-Bang Frequency Comparator with Dead Zone

被引：0
|
作者：
Sadeghi, Vahideh Sadat [1 ]
Naimi, Hossein Miar [1 ]
Kennedy, Michael Peter
机构：
[1] Babol Univ Tehnol, Integrated Circuit Res Lab, Babol Sar, Iran
来源：
2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012) | 2012年
关键词：
BBFC; CPPLL; Deadzone; Offset; Synthesizer;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The frequency synthesizer is one of the most challenging blocks in wireless transceivers; it works as a local oscillator in both the receiver and transmitter. It is generally based on a charge pump phase-locked loop (CPPLL) structure. If we can change the structure of the CPPLL or synthesizer to achieve fast locking, it can be used in applications to improve the locking time. Several methods have been introduced to increase the speed of the locking process. One way to achieve fast locking is to use a bang-bang frequency comparator (BBFC) in the feedthrough path to increase the locking speed. However, using the BBFC leads to unwanted ripple in the control voltage applied to the VCO; this ripple, in turn, leads to worse phase noise. In addition, an offset in the BBFC can produce cycle slipping. Applying a proper deadzone in the BBFC can help the system to overcome the unwanted ripple and cycle slipping. Simulations in MATLAB confirm that applying a deadzone equal to or larger than the frequency offset can suppress the unwanted ripple.
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收藏
页码：1379 / 1382
页数：4
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