Pole-Phase Modulated Multiphase Induction Motor Drive With Reduced Torque Ripple and Improved DC Link Utilization

被引:31
作者
Umesh, B. S. [1 ]
Sivakumar, K. [2 ]
机构
[1] GE Global Res, Bengaluru 560066, India
[2] Indian Inst Technol, Dept Elect Engn, Hyderabad 502285, Telangana, India
关键词
Carrier-based multiphase space vector pulse width modulation (PWM); improving dc link utilization; multilevel multiphase induction motor drives; pole-phase modulation (PPM); torque ripple reduction; COMMON-MODE VOLTAGE; SPACE VECTOR PWM; PULSE-WIDTH MODULATION; CONVERTERS;
D O I
10.1109/TPEL.2016.2634092
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Wider speed and torque range is one of the major requirements of high-power propulsion and traction applications. Pole-phase modulation (PPM) of multiphase induction motors provide extended speed-torque range without the need of oversizing the motor rating. Particularly, PPM of nine-phase IM gives four-pole and 12-pole mode of operations with wider speed and torque variations. But in three-phase (3-phi) 12-pole mode higher torque ripple degrades the performance of drive system. Further, in nine-phase (9-phi) four-pole mode the extra dc link utilization (DLU) using 9-phi space vector pulse width modulation (SVPWM) is very less compared to the 3-phi SVPWM. Possible techniques to improve DLU by adding third harmonic order offset value to the sine references introduce dominant lower order harmonic currents in to the phase windings. To address these problems, this paper proposes a multilevel voltage generation technique using an auxiliary 3-phi two-level inverter for reducing high torque pulsations during starting. Compared to the conventional multilevel inverters, the proposed multilevel inverter scheme gives the same number of voltage levels with considerably less device count. In addition, this paper also proposes a simple and effective phase grouping method to avoid dominant lower order harmonic currents into the phase windings while improving the DLU of four-pole operation. The proposed performance improvement technique for PPM of 9-phi IM is simulated in ANSYS Maxwell two-dimensional and Simplorer environment. A prototype of 5-hp 9-phi IM drive controlled using SPARTAN 6 FPGA board is developed for validating the proposed performance improvement methods experimentally.
引用
收藏
页码:7862 / 7869
页数:8
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