Single Phase Symmetrical and Asymmetrical Design of Multilevel Inverter Topology with Reduced Number of Switches

被引:19
作者
Siddique, Marif Daula [1 ]
Mustafa, Asif [1 ]
Sarwar, Adil [2 ]
Mekhilef, Saad [1 ]
Shah, Noraisyah Binti Mohamed [1 ]
Seyedamahmousian, Mehdi [3 ]
Stojcevski, Alex [3 ]
Horan, Ben [4 ]
Ogura, Koki [5 ]
机构
[1] Univ Malaya, Power Elect & Renewable Energy Res Lab, Kuala Lumpur, Malaysia
[2] Aligarh Muslim Univ, Dept Elect Engn, Aligarh, Uttar Pradesh, India
[3] Swinburne Univ, Sch Software & Elect Engn, Melbourne, Vic, Australia
[4] Deakin Univ, Sch Engn, Geelong, Vic, Australia
[5] Kyushu Sangyo Univ, Fac Sci & Engn, Dept Elect Engn, Fukuoka, Japan
来源
2018 IEEMA ENGINEER INFINITE CONFERENCE (ETECHNXT) | 2018年
关键词
Multilevel inverter; symmetrical; asymmetrical; H-bridge; fundamental frequency switching; total harmonic distortion; VOLTAGE;
D O I
10.1109/ETECHNXT.2018.8385334
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Multilevel Inverters have shaped a new trend of importance in industry and research. A new topology of multilevel inverter is proposed in this paper which can be operated in symmetrical and asymmetrical modes. The proposed topology produces 7-level and 13-level staircase output voltage waveform for symmetrical and asymmetrical configuration respectively using only 10 switches. The gate signals for the different switches are produced employing the fundamental frequency switching technique. The topology achieves better performance using a lower minimum number of components in comparison to conventional inverters. These improvements result in reduced system cost and size. Simulations are carried out using MATLAB/SIMULINK environment and experimental implementation using laboratory prototype module have ascertained the performance and operation of the proposed topology.
引用
收藏
页数:6
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