Junctionless Tunnel Field Effect Transistor

被引：314

作者：

Ghosh, Bahniman ^{[1
]}

Akram, Mohammad Waseem ^{[2
]}

机构：

[1] Univ Texas Austin, Microelect Res Ctr, Austin, TX 78758 USA

[2] Indian Inst Technol, Dept Elect Engn, Kanpur 208016, Uttar Pradesh, India

来源：

IEEE ELECTRON DEVICE LETTERS | 2013年 / 34卷 / 05期

关键词：

High-k dielectric material; junctionless field effect transistor (JLFET); subthreshold slope (SS); tunnel field effect transistor (TFET); FET;

D O I：

10.1109/LED.2013.2253752

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this letter, a double-gate junctionless tunnel field effect transistor (JL-TFET) is proposed and investigated. The JL-TFET is a Si-channel heavily n-type-doped junctionless field effect transistor (JLFET), which uses two isolated gates (Control-Gate, P-Gate) with two different metal work-functions to behave like a tunnel field effect transistor (TFET). In this structure, the advantages of JLFET and TFET are combined together. The simulation results of JL-TFET with high-k dielectric material (TiO2) of 20-nm gate length shows excellent characteristics with high I-ON/I-OFF ratio (similar to 6 x 10(8)), a point subthreshold slope (SS) of similar to 38 mV/decade, and an average SS of similar to 70 mV/decade at room temperature, which indicates that JL-TFET is a promising candidate for a switching performance.

引用

页码：584 / 586

页数：3

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