Design and Implementation of Reconfigurable Stream Processor in Multimedia Applications

被引：0

作者：

Xiao, Yu ^{[1
]}

Liu, Leibo ^{[1
]}

Wei, ShaoJun ^{[1
]}

机构：

[1] Tsinghua Univ, Inst Microelect, Tsinghua Natl Lab Informat Sci & Technol, Beijing 100084, Peoples R China

来源：

2008 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS PROCEEDINGS, VOLS 1 AND 2: VOL 1: COMMUNICATION THEORY AND SYSTEM | 2008年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper proposed a Reconfigurable Stream Processor applied in multimedia applications. Based on the unique parallel stream processing framework and optimized algorithm mapping method, the reconfigurable processor exploits the parallelism of complex algorithms and provides a high flexibility during run-time to adapt to various applications. The architecture of processor is implemented and verified on the development board of ARM926EJS plus Xilinx Virtex-4XC4VLX80. A H.264 video codec is implemented to verify the reconfigurable architecture, achieving 58%similar to 130% speed boost compared with traditional reconfigurable architectures such as MorphoSys and PACT.

引用

页码：1510 / 1514

页数：5

共 50 条

[41] Reconfigurable discrete wavelet transform processor for heterogeneous reconfigurable multimedia systems
Tseng, PC
Huang, CT
Chen, LG
JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2005, 41 (01): : 35 - 47
[42] Reconfigurable Discrete Wavelet Transform Processor for Heterogeneous Reconfigurable Multimedia Systems
Po-Chih Tseng
Chao-Tsung Huang
Liang-Gee Chen
Journal of VLSI signal processing systems for signal, image and video technology, 2005, 41 : 35 - 47
[43] Reconfigurable Mobile Stream Processor for Ray Tracing
Kim, Hong-Yun
Kim, Young-Jun
Kim, Lee-Sup
IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE 2010, 2010,
[44] Processor Architectures for multimedia applications
Pirsch, P
Freimann, A
Klar, C
Wittenburg, JP
EMBEDDED PROCESSOR DESIGN CHALLENGES: SYSTEMS, ARCHITECTURES, MODELLING, AND SIMULATION - SAMOS, 2002, 2268 : 188 - 206
[45] Reconfigurable stream processor architecture for software radio
Gao, Deyuan
Tian, Hangpei
Zhu, Yi'an
Hangkong Xuebao/Acta Aeronautica et Astronautica Sinica, 2008, 29 (06): : 1612 - 1618
[46] A defect-tolerant reconfigurable nanoarchitecture design for multimedia applications
Lai, Yeong-Kang
Chen, Lien-Fei
COLLOIDS AND SURFACES A-PHYSICOCHEMICAL AND ENGINEERING ASPECTS, 2008, 313 : 465 - 468
[47] The VHDL Implementation of Reconfigurable MIPS Processor
Ziebinski, Adam
Swierc, Stanislaw
MAN-MACHINE INTERACTIONS, 2009, 59 : 663 - +
[48] Design and implementation of data stream processing applications
Kwan, Edwin
Getta, Janusz R.
Vossough, Ehsan
ICSOFT 2007: PROCEEDINGS OF THE SECOND INTERNATIONAL CONFERENCE ON SOFTWARE AND DATA TECHNOLOGIES, VOL ISDM/WSEHST/DC, 2007, : 193 - +
[49] Design and Implementation of a Coarse-grained Dynamically Reconfigurable Multimedia Accelerator
Nguyen, Hung K.
Tran, Xuan-Tu
ACM TRANSACTIONS ON PARALLEL COMPUTING, 2022, 9 (03)
[50] Design and Implementation of Dynamic Key Based Stream Cipher for Cryptographic Processor
Pandian, K. K. Soundra
Pal, Saptadeep
Chandra, Kailash
2015 3RD INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING, COMMUNICATION AND NETWORKING (ICSCN), 2015,

← 1 2 3 4 5 →