Effect of Negative Bias Temperature Instability on the Single Event Upset Response of 40 nm Flip-Flops

被引：15

作者：

Kauppila, Amy V. ^{[1
]}

Bhuva, Bharat L. ^{[1
,2
]}

Loveless, T. D. ^{[1
,2
]}

Jagannathan, S. ^{[1
]}

Gaspard, N. J. ^{[1
]}

Kauppila, J. S. ^{[2
]}

Massengill, Lloyd W. ^{[1
,2
]}

Wen, S. J. ^{[3
]}

Wong, R. ^{[3
]}

Vaughn, G. L. ^{[4
]}

Holman, W. Timothy ^{[1
,2
]}

机构：

[1] Vanderbilt Univ, Dept Elect Engn & Comp Sci, Nashville, TN 37235 USA

[2] Vanderbilt Univ, Inst Space & Def Elect, Nashville, TN 37212 USA

[3] Cisco Syst Inc, San Jose, CA 95134 USA

[4] Univ Alabama Birmingham, Dept Elect & Comp Engn, Birmingham, AL 35294 USA

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 2012年 / 59卷 / 06期

关键词：

CMOS; negative bias temperature instability (NBTI); process variation; single event effects; single event upset; DESIGN;

D O I：

10.1109/TNS.2012.2224136

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Negative bias temperature instability has been experimentally demonstrated to increase the cross-section of the single event response for 40 nm flip-flops. Analysis on the underlying mechanisms, including threshold voltage shift, is presented.

引用

页码：2651 / 2657

页数：7

共 22 条

[21] Effect of nitrogen profile and fluorine incorporation on negative-bias temperature instability of ultrathin plasma-nitrided SiON MOSFETs
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[22] Circuit Effect on Collection Mechanisms Involved in Single Event Phenomena: Application to the Response of a NMOS Transistor in a 90 nm SRAM Cell
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