Effect of Negative Bias Temperature Instability on the Single Event Upset Response of 40 nm Flip-Flops

被引：15

作者：

Kauppila, Amy V. ^{[1
]}

Bhuva, Bharat L. ^{[1
,2
]}

Loveless, T. D. ^{[1
,2
]}

Jagannathan, S. ^{[1
]}

Gaspard, N. J. ^{[1
]}

Kauppila, J. S. ^{[2
]}

Massengill, Lloyd W. ^{[1
,2
]}

Wen, S. J. ^{[3
]}

Wong, R. ^{[3
]}

Vaughn, G. L. ^{[4
]}

Holman, W. Timothy ^{[1
,2
]}

机构：

[1] Vanderbilt Univ, Dept Elect Engn & Comp Sci, Nashville, TN 37235 USA

[2] Vanderbilt Univ, Inst Space & Def Elect, Nashville, TN 37212 USA

[3] Cisco Syst Inc, San Jose, CA 95134 USA

[4] Univ Alabama Birmingham, Dept Elect & Comp Engn, Birmingham, AL 35294 USA

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 2012年 / 59卷 / 06期

关键词：

CMOS; negative bias temperature instability (NBTI); process variation; single event effects; single event upset; DESIGN;

D O I：

10.1109/TNS.2012.2224136

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Negative bias temperature instability has been experimentally demonstrated to increase the cross-section of the single event response for 40 nm flip-flops. Analysis on the underlying mechanisms, including threshold voltage shift, is presented.

引用

页码：2651 / 2657

页数：7

共 22 条

[1] Impact of Process Variations and Charge Sharing on the Single-Event-Upset Response of Flip-Flops
Kauppila, A. V.
Bhuva, B. L.
Massengill, L. W.
Holman, W. T.
Ball, D. R.
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2011, 58 (06) : 2658 - 2663
[2] Impact of Well Contacts on the Single Event Response of Radiation-Hardened 40-nm Flip-flops
Chatterjee, Indranil
Jagannathan, Srikanth
Loveless, Daniel
Bhuva, Bharat L.
Wen, Shi-Jie
Wong, Richard
Sachdev, Manoj
2012 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2012,
[3] Impact of Negative Bias Temperature Instability on Gate-All-Around Flip-Flops
Taghipour, Shiva
Asli, Rahebeh Niaraki
JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2019, 35 (01): : 119 - 125
[4] Supply Voltage Dependency on the Single Event Upset Susceptibility of Temporal Dual-Feedback Flip-Flops in a 90 nm Bulk CMOS Process
Hasanbegovic, Amir
Aunet, Snorre
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2015, 62 (04) : 1888 - 1897
[5] Single-Event Performance and Layout Optimization of Flip-Flops in a 28-nm Bulk Technology
Lilja, K.
Bounasser, M.
Wen, S. -J.
Wong, R.
Holst, J.
Gaspard, N.
Jagannathan, S.
Loveless, D.
Bhuva, B.
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2013, 60 (04) : 2782 - 2788
[6] Effects of voltage stress on the single event upset (SEU) response of 65 nm flip flop
Chua, C. T.
Ong, H. G.
Sanchez, K.
Perdu, P.
Gan, C. L.
MICROELECTRONICS RELIABILITY, 2016, 64 : 199 - 203
[7] Frequency Dependence of Heavy-Ion-Induced Single-Event Responses of Flip-Flops in a 16-nm Bulk FinFET Technology
Zhang, H.
Jiang, H.
Bhuva, B. L.
Kauppila, J. S.
Holman, W. T.
Massengill, L. W.
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2018, 65 (01) : 413 - 417
[8] Frequency Dependence of Alpha-Particle Induced Soft Error Rates of Flip-Flops in 40-nm CMOS Technology
Jagannathan, S.
Loveless, T. D.
Bhuva, B. L.
Gaspard, N. J.
Mahatme, N.
Assis, T.
Wen, S-J.
Wong, R.
Massengill, L. W.
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2012, 59 (06) : 2796 - 2802
[9] Performance, Metastability, and Soft-Error Robustness Trade-offs for Flip-Flops in 40 nm CMOS
Rennie, David
Li, David
Sachdev, Manoj
Bhuva, Bharat L.
Jagannathan, Srikanth
Wen, ShiJie
Wong, Richard
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2012, 59 (08) : 1626 - 1634
[10] Flip-flops soft error rate evaluation approach considering internal single-event transient
SONG RuiQiang
CHEN ShuMing
HE YiBai
DU YanKang
Science China(Information Sciences), 2015, 58 (06) : 159 - 170

← 1 2 3 →