Low thermal budget selective epitaxial growth for formation of elevated source/drain MOS transistors

被引:2
作者
Nakahata, T [1 ]
Sugihara, K [1 ]
Abe, Y [1 ]
Ozeki, T [1 ]
机构
[1] Mitsubishi Electr Corp, Adv Technol R&D Ctr, Amagasaki, Hyogo 6618661, Japan
关键词
crystal morphology; chemical vapor deposition process; selective epitaxy; semiconducting silicon; field effect transistor;
D O I
10.1016/j.jcrysgro.2003.12.072
中图分类号
O7 [晶体学];
学科分类号
0702 ; 070205 ; 0703 ; 080501 ;
摘要
We studied the dependence of selective epitaxially grown silicon (SEG-Si) morphology under ultrahigh vacuum chemical vapor deposition (UHV-CVD) conditions by using a mixture of disilane (Si2H6) and chlorine (Cl-2) gases on Si(100) substrates patterned a metal oxide semiconductor transistor with Si3N4 sidewalls. We confirmed that the morphology of the SEG-Si is strongly dependent on the dry etching conditions used for formation of the sidewall structures and that the Cl-2 plasma etching process results in lower damage to the substrate surface than CHF3/Ar plasma etching. It was demonstrated that by combining low-damage sidewall etching with Cl-2 plasma and the UHV-CVD process with deoxidation effects it was possible to flatten the SEG-Si surface at temperatures below 700degreesC without the need for preheating at a higher temperature. (C) 2004 Elsevier B.V. All rights reserved.
引用
收藏
页码:79 / 85
页数:7
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