W versus Co-Al as Gate Fill-Metal for Aggressively Scaled Replacement High-k/Metal Gate Devices for (Sub-)22 nm Technology Nodes

被引：3

作者：

Veloso, Anabela ^{[1
]}

Chew, Soon Aik ^{[1
]}

Schram, Tom ^{[1
]}

Dekkers, Harold ^{[1
]}

Van Ammel, Annemie ^{[1
]}

Witters, Thomas ^{[1
]}

Tielens, Hilde ^{[1
]}

Heylen, Nancy ^{[1
]}

Devriendt, Katia ^{[1
]}

Sebaai, Farid ^{[1
]}

Brus, Stephan ^{[1
]}

Ragnarsson, Lars-Ake ^{[1
]}

Pantisano, Luigi ^{[1
]}

Eneman, Geert ^{[1
]}

Carbonell, Laure ^{[1
]}

Richard, Olivier ^{[1
]}

Favia, Paola ^{[1
]}

Geypen, Jef ^{[1
]}

Bender, Hugo ^{[1
]}

Higuchi, Yuichi ^{[2
]}

Phatak, Anup ^{[3
]}

Thean, Aaron ^{[1
]}

Horiguchi, Naoto ^{[1
]}

机构：

[1] IMEC, B-3001 Louvain, Belgium

[2] Panasonic, IMEC, B-3001 Louvain, Belgium

[3] Appl Mat Belgium NV, IMEC, B-3001 Louvain, Belgium

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS | 2013年 / 52卷 / 04期

关键词：

LOGIC TECHNOLOGY; TEMPERATURE; TRANSISTORS;

D O I：

10.7567/JJAP.52.04CA03

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

In this work we provide a comprehensive evaluation of a novel, low-resistance Co-Al alloy vs W to fill aggressively scaled gates with high aspect-ratios [gate height (H-gate) similar to 50-60 nm, gate length (L-gate) >= 20-25 nm]. We demonstrate that, with careful liner/barrier materials selection and tuning, well-behaved devices are obtained, showing: tight gate resistance (R-gate) distributions down to L-gate similar to 20 nm, low threshold voltage (V-T) values, comparable DC and bias temperature instability (BTI) behavior, and improved RF response. The impact of fill-metals intrinsic stress, including the presence of occasional voids in narrow W-gates, on devices fabrication and performance is also explored. (C) 2013 The Japan Society of Applied Physics

引用

页数：6

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