A Single-Chip X-Band Chirp Radar MMIC with Stretch Processing

被引:0
|
作者
Yu, Jianjun [1 ]
Zhao, Feng [1 ]
Cali, Joseph [1 ]
Ma, Desheng [1 ]
Geng, Xueyang [1 ]
Dai, Fa Foster [1 ]
Irwin, J. David [1 ]
Aklian, Andre [2 ]
机构
[1] Auburn Univ, Dept Elect & Comp Engn, Auburn, AL 36849 USA
[2] US Army Res, Intelligence & Informat Warfare Directorate, CERDEC, RDECOM, Adelphi, MD 20783 USA
关键词
Transceiver; X-band Radar; Chirp; Stretch Processing; DDS; PLL; CMOS TRANSCEIVER;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A single-chip X-band chirp radar transceiver with direct digital synthesis (DDS) for chirp generation is presented. The radar chip, including receiver, transmitter, quadrature DDS, phase-locked loop (PLL) and analog to digital converter (ADC), has been implemented in a 0.13 mu m BiCMOS technology. The stretch processing technique is employed to translate the time interval between the received and the transmitted chirp signals to a single tone at the baseband output with greatly reduced bandwidth, which allows for the use of a low-cost ADC with a reduced input bandwidth of 10MHz for digitizing the received RF chirp with a bandwidth of 150MHz. A Weaver receiver with a dc-offset is employed in order to use a single ADC for detecting the received quadrature signals with image rejection. A quadrature 1GHz DDS with an inverse sinc function for zero-order hold correction is implemented to provide the chirp signals for both receiver and transmitter. A wide-tuning PLL frequency synthesizer is integrated to generate the local oscillator (LO) signals as well as the clock signal for the DDS and ADC. The implemented radar-on-chip (RoC) MMIC occupies a die area of 3.5 x 2.5mm(2). With a 2.2V supply voltage for analog/RF and a 1.5V supply for digital, the chip consumes 326mW in the receive mode and 333mW in the transmit mode.
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页数:4
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