Topology, Efficiency Analysis, and Control of a Four-Level π -Type Converter

被引:42
作者
Jin, Bosen [1 ]
Yuan, Xibo [1 ]
机构
[1] Univ Bristol, Dept Elect & Elect Engn, Bristol BS8 1UB, Avon, England
基金
英国工程与自然科学研究理事会;
关键词
Multilevel converter; four-level converter; low-voltage application; power loss; pulsewidth modulation (PWM); voltage balancing control; VOLTAGE BALANCING CONTROL; CLAMPED MULTILEVEL CONVERTERS; SPACE-VECTOR MODULATION; OPTIMIZATION; LIMITS;
D O I
10.1109/JESTPE.2018.2875485
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper provides a comprehensive analysis for a four-level pi-type converter for low-voltage applications. This topology is a kind of reduced device-count neutral-point-clamped multilevel converter and formed by only six switches in each phase leg. The line (phase-to-phase) output voltage can have seven levels and the output harmonics are much lower than that of a standard two-level converter. The switching states and their associated output voltage levels have been analyzed. A generalized averaged analytical power loss model of this converter has also been developed to investigate the loss distribution among the power devices as well as the efficiency. The four-level pi-type converter has a higher efficiency when the switching frequency is above 5 kHz compared with two-level and three-level converters with the power devices used in this paper. The reduced output harmonics, hence reduced filtering requirement together with improved efficiency and cooling (heat sink) requirement, offer a higher density alternative to the two-level converter. A simplified level shifted carrier-based modulation method with dynamic optimal zero-sequence signal injection has been employed to modulate the converter and to control dc-link neutral-point voltages. This paper has experimentally validated the predicted four-level pi-type converter efficiency and the neutral point voltage balancing control with a back-to-back configuration under high modulation indices and unity power factor. The neutral-point voltage balance region has been plotted and experimentally verified.
引用
收藏
页码:1044 / 1059
页数:16
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