Design of low voltage, low power CMOS low noise amplifier for 2.4 GHz wireless communications

被引:1
作者
Huang, Chien-Chang [1 ]
Ku, Kai-Wei [1 ]
机构
[1] Yuan Ze Univ, Dept Commun Engn, Tao Yuan 320, Taiwan
关键词
CMOS; low noise amplifier; low power; low voltage;
D O I
10.1002/mop.27214
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this letter, design of a low voltage, low power CMOS low noise amplifier (LNA) for 2.4 GHz wireless communications is presented by using TSMC 0.18-mu m technology. The current reused architecture is adapted to reduce the consumed current, while the supply voltage is set to 0.6 V to meet the low voltage requirement as well. To simplify the bias network designs under low voltage operations, NMOS and PMOS devices are used with three-stage configuration to enhance the gain performance. The measured results of the designed LNA show 17.7 dB in gain and 3.9 dB in noise figure with 0.86 mW of power consumption. (c) 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:28492852, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27214
引用
收藏
页码:2849 / 2852
页数:4
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