A low-power, fast-settling reference circuit for high-speed high-resolution ADC

被引：3

作者：

Cai, Hua ^{[1
]}

Cai, Ningyu ^{[2
]}

机构：

[1] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Devic, Chengdu 610054, Peoples R China

[2] Analog IC Design Ctr Chengdu High Tech Zone, Chengdu, Peoples R China

来源：

INTERNATIONAL JOURNAL OF ELECTRONICS | 2014年 / 101卷 / 04期

关键词：

fast-settling; low-power; reference buffer; bandgap and pipeline ADC; PIPELINE ADC;

D O I：

10.1080/00207217.2013.785033

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A low-power, fast-settling reference buffer used for high-speed high-resolution ADC is proposed. A replica buffer forms a closed loop to stabilise the operating point and a cascaded gm-boosting technique provides sufficient low output impedance, all of which ensure a high performance for the proposed buffer. The measured results show that the proportion of power consumption by the proposed buffer over ADC is only 2.7%, while settling to 12-bit accuracy within 0.13ns.

引用

页码：492 / 499

页数：8

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