A Fine-Granularity Image Pyramid Accelerator for Embedded Processors

被引:0
作者
Tsai, Chun-Jen [1 ]
Wang, Chiang-Yi [1 ]
机构
[1] Natl Chiao Tung Univ, Dept Comp Sci, Hsinchu, Taiwan
来源
EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING, AND SIMULATION, SAMOS 2020 | 2020年 / 12471卷
关键词
Image pyramid; Down-sampling filter; Computer vision; Coarse-to-fine processing; Hardware-software codesign;
D O I
10.1007/978-3-030-60939-9_6
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Image-pyramid generator is an important component for many computer vision applications. Due to the complexity of image scaling operations, embedded application processors usually generate three- or four-level image pyramids for vision applications. In this paper, we present an image pyramid accelerator for embedded processors that generates image pyramids of up to 24-levels of down-sampled resolutions for the input image. Since image pyramids are crucial for the coarse-to-fine analysis of many computer vision problems, more resolution levels in the image pyramid can improve the parameter-estimation accuracy. Furthermore, the down-sampling filters used in the proposed design is based on a long-tap Sine-windowed Sinc function filter. Therefore, it preserves more image details than other low-complexity filters such as the bilinear or the bicubic interpolation filter. The proposed circuit is verified on an FPGA development board with a Xilinx Kintex-7 device and will be made open-source. The experimental results show that the design is very promising for real-time computer vision applications.
引用
收藏
页码:84 / 95
页数:12
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