A Novel Hardware Gaussian Noise Generator using Box-Muller and CORDIC

A novel hardware Gaussian noise generator based on the Box-Muller method and the Coordinate Rotation Digital Computer (CORDIC) Algorithm is presented. The main novelties of this work are using Modified CORDIC Algorithm with Domain Folding (MDF-CORDIC) algorithm and expanding the range of convergence of the CORDIC algorithm to improve the operation accuracy for the elementary functions involved in the Box-Muller method. Due to the modified CORDIC algorithm, two 16-bit highly accurate noise samples are generated every clock cycle and the accuracy can reach 10(-7) while the conventional is 10(-3). The noise generator can also accurately model a true Gaussian probability density function even at high sigma values. This design is implemented on a Xilinx XC4VLX15 Virtex-4 device field-programmable gate array (FPGA) at 155 MHz; it takes up 5% of the device and produces 155 million samples per second.