Formation of III-V-on-insulator structures on Si by direct wafer bonding

被引:47
作者
Yokoyama, Masafumi [1 ]
Iida, Ryo [1 ]
Ikku, Yuki [1 ]
Kim, Sanghyeon [1 ]
Takagi, Hideki [2 ]
Yasuda, Tetsuji [2 ]
Yamada, Hisashi [3 ]
Ichikawa, Osamu [3 ]
Fukuhara, Noboru [3 ]
Hata, Masahiko [3 ]
Takenaka, Mitsuru [1 ]
Takagi, Shinichi [1 ]
机构
[1] Univ Tokyo, Dept Elect Engn & Informat Syst EEIS, Grad Sch Engn, Bunkyo Ku, Tokyo 1138656, Japan
[2] Natl Inst Adv Ind Sci & Technol, Tsukuba, Ibaraki 3058568, Japan
[3] Sumitomo Chem Co Ltd, Tsukuba, Ibaraki 3003294, Japan
关键词
TEMPERATURE; SILICON; TRANSISTOR; VOLTAGE; INGAAS; CMOS;
D O I
10.1088/0268-1242/28/9/094009
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We have studied the formation of III-V-compound-semiconductors-on-insulator (III-V-OI) structures with thin buried oxide (BOX) layers on Si wafers by using developed direct wafer bonding (DWB). In order to realize III-V-OI MOSFETs with ultrathin body and extremely thin body (ETB) InGaAs-OI channel layers and ultrathin BOX layers, we have developed an electron-cyclotron resonance (ECR) O-2 plasma-assisted DWB process with ECR sputtered SiO2 BOX layers and a DWB process based on atomic-layer-deposition Al2O3 (ALD-Al2O3) BOX layers. It is essential to suppress micro-void generation during wafer bonding process to achieve excellent wafer bonding. We have found that major causes of micro-void generation in DWB processes with ECR-SiO2 and ALD-Al2O3 BOX layers are desorption of Ar and H2O gas, respectively. In order to suppress micro-void generation in the ECR-SiO2 BOX layers, it is effective to introduce the outgas process before bonding wafers. On the other hand, it is a possible solution for suppressing micro-void generation in the ALD-Al2O3 BOX layers to increase the deposition temperature of the ALD-Al2O3 BOX layers. It is also another possible solution to deposit ALD-Al2O3 BOX layers on thermally oxidized SiO2 layers, which can absorb the desorption gas from ALD-Al2O3 BOX layers.
引用
收藏
页数:10
相关论文
共 33 条
[21]   InP photonic wire waveguide using InAlAs oxide cladding layer [J].
Takenaka, M. ;
Nakano, Y. .
OPTICS EXPRESS, 2007, 15 (13) :8422-8427
[22]   InGaAsP Photonic Wire Based Ultrasmall Arrayed Waveguide Grating Multiplexer on Si Wafer [J].
Takenaka, Mitsuru ;
Yokoyama, Masafumi ;
Sugiyama, Masakazu ;
Nakano, Yoshiaki ;
Takagi, Shinichi .
APPLIED PHYSICS EXPRESS, 2009, 2 (12)
[23]  
Tong Q., 1999, SEMICONDUCTOR WAFER
[24]   Low temperature InP/Si wafer bonding [J].
Tong, QY ;
Gan, Q ;
Hudson, G ;
Fountain, G ;
Enquist, P .
APPLIED PHYSICS LETTERS, 2004, 84 (05) :732-734
[25]   Front-gate InGaAs-on-Insulator metal-insulator-semiconductor field-effect transistors [J].
Urabe, Yuji ;
Yokoyama, Masafumi ;
Takagi, Hideki ;
Yasuda, Tetsuji ;
Miyata, Noriyuki ;
Yamada, Hisashi ;
Fukuhara, Noboru ;
Hata, Masahiko ;
Takenaka, Mitsuru ;
Takagi, Shinichi .
APPLIED PHYSICS LETTERS, 2010, 97 (25)
[26]   Capacitance-voltage studies on enhancement-mode InGaAs metal-oxide-semiconductor field-effect transistor using atomic-layer-deposited Al2O3 gate dielectric [J].
Xuan, Y. ;
Lin, H. C. ;
Ye, P. D. ;
Wilk, G. D. .
APPLIED PHYSICS LETTERS, 2006, 88 (26)
[27]   High Mobility III-V-On-Insulator MOSFETs on Si with ALD-Al2O3 BOX layers [J].
Yokoyama, M. ;
Urabe, Y. ;
Yasuda, T. ;
Takagi, H. ;
Ishii, H. ;
Miyata, N. ;
Yamada, H. ;
Fukuhara, N. ;
Hata, M. ;
Sugiyama, M. ;
Nakano, Y. ;
Takenaka, M. ;
Takagi, S. .
2010 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2010, :235-+
[28]  
YOKOYAMA M, 2010, IEDM, P46
[29]   III-V/Ge High Mobility Channel Integration of InGaAs n-Channel and Ge p-Channel Metal-Oxide-Semiconductor Field-Effect Transistors with Self-Aligned Ni-Based Metal Source/Drain Using Direct Wafer Bonding [J].
Yokoyama, Masafumi ;
Kim, Sanghyeon ;
Zhang, Rui ;
Taoka, Noriyuki ;
Urabe, Yuji ;
Maeda, Tatsuro ;
Takagi, Hideki ;
Yasuda, Tetsuji ;
Yamada, Hisashi ;
Ichikawa, Osamu ;
Fukuhara, Noboru ;
Hata, Masahiko ;
Sugiyama, Masakazu ;
Nakano, Yoshiaki ;
Takenaka, Mitsuru ;
Takagi, Shinichi .
APPLIED PHYSICS EXPRESS, 2012, 5 (07)
[30]   Sub-10-nm Extremely Thin Body InGaAs-on-Insulator MOSFETs on Si Wafers With Ultrathin Al2O3 Buried Oxide Layers [J].
Yokoyama, Masafumi ;
Iida, Ryo ;
Kim, Sanghyeon ;
Taoka, Noriyuki ;
Urabe, Yuji ;
Takagi, Hideki ;
Yasuda, Tetsuji ;
Yamada, Hisashi ;
Fukuhara, Noboru ;
Hata, Masahiko ;
Sugiyama, Masakazu ;
Nakano, Yoshiaki ;
Takenaka, Mitsuru ;
Takagi, Shinichi .
IEEE ELECTRON DEVICE LETTERS, 2011, 32 (09) :1218-1220