PAAG: A Polymorphic Array Architecture for Graphics and Image Processing

被引：7
|
作者：
Li, Tao [1 ]
Xiao, Lingzhi [1 ]
Huang, Hucai [2 ]
Han, Jungang [2 ]
机构：
[1] XiAn Univ Posts & Telecom, Res Ctr Telecom ASIC Design, Xian, Peoples R China
[2] XiAn Univ Posts & Telecom, Sch Comp Sci, Xian, Peoples R China
来源：
2012 FIFTH INTERNATIONAL SYMPOSIUM ON PARALLEL ARCHITECTURES, ALGORITHMS AND PROGRAMMING (PAAP) | 2012年
关键词：
Parallel computation; polymorphic architecture; data parallelism; thread level parallelism; operation level parallelism; thread scheduling; message routin.g;
D O I：
10.1109/PAAP.2012.53
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
A novel, polymorphic array architecture is proposed in this paper. This architecture is capable of supporting a dynamic mixture of data parallel computation (DLP), thread level parallel computation (TLP), and operation level parallel computation (OLP). We aim at designing a programmable architecture that can approach ASIC performance. This is accomplished through new architectural features and implementation level innovations. The architecture and its implementation are presented in the paper to demonstrate its feasibility and capabilities.
引用
收藏
页码：242 / 249
页数：8
相关论文
共 50 条
  • [1] ADVANCED ARCHITECTURE FOR GRAPHICS AND IMAGE-PROCESSING
    ENGLAND, N
    PROCEEDINGS OF THE SOCIETY OF PHOTO-OPTICAL INSTRUMENTATION ENGINEERS, 1981, 301 : 54 - 57
  • [2] PARALLEL ARCHITECTURE TACKLES GRAPHICS AND IMAGE-PROCESSING
    PIOL, A
    COMPUTER DESIGN, 1987, 26 (16): : 65 - 68
  • [3] PARALLEL ARCHITECTURE TACKLES GRAPHICS AND IMAGE PROCESSING.
    Piol, Alessandro
    1600, (26):
  • [4] An Architecture for Graphics Processing in an FPGA
    Dutton, Marcus
    Keezer, David
    FPGA 10, 2010, : 283 - 283
  • [5] PIPArch: Programmable Image Processing Architecture Using Sliding Array
    Wu, Feiyang
    Song, Zhuoran
    Ke, Jing
    Jiang, Li
    Jing, Naifeng
    Liang, Xiaoyao
    19TH IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL AND DISTRIBUTED PROCESSING WITH APPLICATIONS (ISPA/BDCLOUD/SOCIALCOM/SUSTAINCOM 2021), 2021, : 73 - 80
  • [6] Array architecture and design for image window operation processing asics
    Li, DJ
    Jiang, L
    Isshiki, T
    Kunieda, H
    ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6, 1998, : A474 - A477
  • [7] A Graphics Image Processing System
    Li, Linlin
    Tan, Chew Lim
    PROCEEDINGS OF THE 8TH IAPR INTERNATIONAL WORKSHOP ON DOCUMENT ANALYSIS SYSTEMS, 2008, : 455 - 462
  • [8] Design of Graphics Processing Unit for Image Processing
    Panappally, J. George Cherian
    Dhanesh, M. S.
    2014 First International Conference on Computational Systems and Communications (ICCSC), 2014, : 299 - 302
  • [9] Image-processing methods on general-purpose graphics processors with parallel architecture
    Filatov, V. I.
    JOURNAL OF OPTICAL TECHNOLOGY, 2012, 79 (11) : 716 - 720
  • [10] Design optimization of VLSI array processor architecture for window image processing
    Li, DJ
    Jiang, L
    Kunieda, H
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 1999, E82A (08) : 1475 - 1484
12345