Multiplier-free DCT approximations for RF multi-beam digital aperture-array space imaging and directional sensing

被引:35
作者
Potluri, U. S. [1 ]
Madanayake, A. [1 ]
Cintra, R. J. [2 ]
Bayer, F. M. [3 ]
Rajapaksha, N. [1 ]
机构
[1] Univ Akron, Dept Elect & Comp Engn, Akron, OH 44325 USA
[2] Univ Fed Pernambuco, Dept Estat, Signal Proc Grp, Recife, PE, Brazil
[3] Univ Fed Santa Maria, Dept Estat, BR-97119900 Santa Maria, RS, Brazil
关键词
multi beamforming; uniform plane waves (UPW); radio astronomy; discrete cosine transform (DCT); discrete Fourier transform (DFT); approximate DCT; RADIO ASTRONOMY; TRANSFORM; COMPRESSION; PROCESSOR; EMBRACE; 1ST;
D O I
10.1088/0957-0233/23/11/114003
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Multi-beamforming is an important requirement for broadband space imaging applications based on dense aperture arrays (AAs). Usually, the discrete Fourier transform is the transform of choice for AA electromagnetic imaging. Here, the discrete cosine transform (DCT) is proposed as an alternative, enabling the use of emerging fast algorithms that offer greatly reduced complexity in digital arithmetic circuits. We propose two novel high-speed digital architectures for recently proposed fast algorithms (Bouguezel, Ahmad and Swamy 2008 Electron. Lett. 44 1249-50) (BAS-2008) and (Cintra and Bayer 2011 IEEE Signal Process. Lett. 18 579-82) (CB-2011) that provide good approximations to the DCT at zero multiplicative complexity. Further, we propose a novel DCT approximation having zero multiplicative complexity that is shown to be better for multi-beamforming AAs when compared to BAS-2008 and CB-2011. The far-field array pattern of ideal DCT, BAS-2008, CB-2011 and proposed approximation are investigated with error analysis. Extensive hardware realizations, implementation details and performance metrics are provided for synchronous field programmable gate array (FPGA) technology from Xilinx. The resource consumption and speed metrics of BAS-2008, CB-2011 and the proposed approximation are investigated as functions of system word size. The 8-bit versions are mapped to emerging asynchronous FPGAs leading to significantly increased real-time throughput with clock rates at up to 925.6 MHz implying the fastest DCT approximations using reconfigurable logic devices in the literature.
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页数:15
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