Backend dielectric reliability simulator for microprocessor system

被引：3

作者：

Chen, Chang-Chih ^{[1
]}

Ahmed, Fahad ^{[1
]}

Kim, Dae Hyun ^{[1
]}

Lim, Sung Kyu ^{[1
]}

Milor, Linda ^{[1
]}

机构：

[1] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA

来源：

MICROELECTRONICS RELIABILITY | 2012年 / 52卷 / 9-10期

基金：

美国国家科学基金会;

关键词：

LIFETIME;

D O I：

10.1016/j.microrel.2012.07.002

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Backend dielectric breakdown is one of the major sources of wearout for microprocessors. We present test data and a methodology to accurately estimate the lifetime for a microprocessor system due to backend dielectric breakdown. Our methodology incorporates activity in the nets surrounding each dielectric segment in the layout, temperature, and all layout spacings among parallel tracks. We analyze several layouts using our methodology and show the impact of backend dielectric wearout on microprocessor system lifetime. (C) 2012 Elsevier Ltd. All rights reserved.

引用

页码：1953 / 1959

页数：7

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