III-V/Ge High Mobility Channel Integration of InGaAs n-Channel and Ge p-Channel Metal-Oxide-Semiconductor Field-Effect Transistors with Self-Aligned Ni-Based Metal Source/Drain Using Direct Wafer Bonding

被引:31
作者
Yokoyama, Masafumi [1 ]
Kim, Sanghyeon [1 ]
Zhang, Rui [1 ]
Taoka, Noriyuki [1 ]
Urabe, Yuji [2 ]
Maeda, Tatsuro [2 ]
Takagi, Hideki [2 ]
Yasuda, Tetsuji [2 ]
Yamada, Hisashi [3 ]
Ichikawa, Osamu [3 ]
Fukuhara, Noboru [3 ]
Hata, Masahiko [3 ]
Sugiyama, Masakazu [1 ]
Nakano, Yoshiaki [1 ]
Takenaka, Mitsuru [1 ]
Takagi, Shinichi [1 ]
机构
[1] Univ Tokyo, Dept Elect Engn & Informat Syst, Bunkyo Ku, Tokyo 1138656, Japan
[2] Natl Inst Adv Ind Sci & Technol, Tsukuba, Ibaraki 3058568, Japan
[3] Sumitomo Chem Co Ltd, Tsukuba, Ibaraki 3003294, Japan
关键词
MOSFETS;
D O I
10.1143/APEX.5.076501
中图分类号
O59 [应用物理学];
学科分类号
摘要
We demonstrated the integration of high-mobility channel InGaAs n-channel and Ge p-channel metal-oxide-semiconductor field-effect transistors (nMOSFETs and pMOSFETs) with self-aligned Ni-InGaAs and Ni-Ge metal source/drain (S/D) on a Ge substrate by direct wafer bonding (DWB). Ni-based metal S/D and Al2O3-based gate stacks have realized the fabrication of high-electron-mobility InGaAs-on-insulator (InGaAs-OI) nMOSFETs and high-hole-mobility Ge pMOSFETs at the same time. The InGaAs-OI nMOSFETs and Ge pMOSFETs exhibited high electron and hole mobilities of 1800 and 260 cm(2) V-1 s(-1) and mobility enhancements against Si of 3.5x and 2.3x, respectively. (C) 2012 The Japan Society of Applied Physics
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页数:3
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共 26 条
[1]  
[Anonymous], VLSI T
[2]   Application of Post-HfO2 Fluorine Plasma Treatment for Improvement of In0.53Ga0.47As MOSFET Performance [J].
Chen, Yen-Ting ;
Wang, Yanzhen ;
Xue, Fei ;
Zhou, Fei ;
Lee, Jack C. .
IEEE ELECTRON DEVICE LETTERS, 2011, 32 (11) :1531-1533
[3]   Fermi-level pinning and charge neutrality level in germanium [J].
Dimoulas, A. ;
Tsipas, P. ;
Sotiropoulos, A. ;
Evangelou, E. K. .
APPLIED PHYSICS LETTERS, 2006, 89 (25)
[4]   Heterogeneous integration of enhancement mode In0.7Ga0.3As quantum well transistor on silicon substrate using thin (≤ 2 gm) composite buffer architecture for high-speed and low-voltage (0.5V) logic applications [J].
Hudait, M. K. ;
Dewey, G. ;
Datta, S. ;
Fastenau, J. M. ;
Kavalieros, J. ;
Liu, W. K. ;
Lubyshev, D. ;
Pillarisetty, R. ;
Rachmady, W. ;
Radosavljevic, M. ;
Rakshit, T. ;
Chau, Robert .
2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2, 2007, :625-+
[5]   Atomically abrupt and unpinned Al2O3/In0.53Ga0.47As interfaces: Experiment and simulation [J].
Kim, Eun Ji ;
Chagarov, Evgueni ;
Cagnon, Joel ;
Yuan, Yu ;
Kummel, Andrew C. ;
Asbeck, Peter M. ;
Stemmer, Susanne ;
Saraswat, Krishna C. ;
McIntyre, Paul C. .
JOURNAL OF APPLIED PHYSICS, 2009, 106 (12)
[6]  
Kim S.H., 2010, IEDM, P596
[7]   Self-Aligned Metal Source/Drain InxGa1-x As n-Metal-Oxide-Semiconductor Field-Effect Transistors Using Ni-InGaAs Alloy [J].
Kim, SangHyeon ;
Yokoyama, Masafumi ;
Taoka, Noriyuki ;
Iida, Ryo ;
Lee, Sunghoon ;
Nakane, Ryosho ;
Urabe, Yuji ;
Miyata, Noriyuki ;
Yasuda, Tetsuji ;
Yamada, Hisashi ;
Fukuhara, Noboru ;
Hata, Masahiko ;
Takenaka, Mitsuru ;
Takagi, Shinichi .
APPLIED PHYSICS EXPRESS, 2011, 4 (02)
[8]   Ultrathin compound semiconductor on insulator layers for high-performance nanoscale transistors [J].
Ko, Hyunhyub ;
Takei, Kuniharu ;
Kapadia, Rehan ;
Chuang, Steven ;
Fang, Hui ;
Leu, Paul W. ;
Ganapathi, Kartik ;
Plis, Elena ;
Kim, Ha Sul ;
Chen, Szu-Ying ;
Madsen, Morten ;
Ford, Alexandra C. ;
Chueh, Yu-Lun ;
Krishna, Sanjay ;
Salahuddin, Sayeef ;
Javey, Ali .
NATURE, 2010, 468 (7321) :286-289
[9]   Ge (100) and (111) N- and P-FETs With High Mobility and Low-T Mobility Characterization [J].
Kuzum, Duygu ;
Pethe, Abhijit J. ;
Krishnamohan, Tejas ;
Saraswat, Krishna C. .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2009, 56 (04) :648-655
[10]  
Lin D., 2009, IEEE International Electron Device Meeting, P327