Warpage Analysis of Flip-Chip PBGA Packages Subject to Thermal Loading

被引:63
作者
Tsai, Ming-Yi [1 ]
Chang, Hsing-Yu [1 ]
Pecht, Michael [2 ,3 ]
机构
[1] Chang Gung Univ, Dept Mech Engn, Kwei Shan 333, Taiwan
[2] City Univ Hong Kong, Kowloon, Hong Kong, Peoples R China
[3] Univ Maryland, Ctr Adv Life Cycle Engn, Elect Prod & Syst Consortium, College Pk, MD 20742 USA
关键词
Flip-chip PBGA (FCBGA) packages; shadow moire; simulation; thermal deformation; warpage; BGA PACKAGES;
D O I
10.1109/TDMR.2009.2023847
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The aim of this paper was to measure and simulate the warpage of flip-chip PBGA packages subject to thermal loading (from room temperature to 260 degrees C). In the experiments, a full-field shadow moire was used tomeasure real-time out-of-plane deformations (warpages) on the substrate and chip surfaces of the flip-chip packages under thermal heating and cooling conditions. A finite-element method (FEM) and Suhir's die-assembly theory, together with the measured material data (elastic moduli and coefficients of thermal expansion (CTEs) for organic substrates), were used to analyze the thermally induced deformations of the packages to gain insight into their mechanics. The strain gauge data used to determine the CTEs of the substrates also indicated that there was nearly no bending strain under thermal loading. The full-field warpages on the substrate surface of the packages from the shadow moire were documented under temperature loading. It was also found that there were different zero-warpage temperatures (which resulted in a variation of warpages at room temperature) for the four test packages during thermal loading, but they had similar warpage rates (the slope of warpage with respect to temperature). This might have been due to the creep of the underfill and the solder bumps in the packages at the solder reflow temperature. Regardless of the zero-warpage temperature, the warpage of the packages can be well simulated or predicted by FEM and Suhir's theory. The key material properties (elastic moduli and CTEs for the substrate and underfill) that affect the maximum warpage of the package were thoroughly studied. It was found that, among these material properties, a low elastic modulus for the underfill can significantly reduce the maximum warpage, while its CTE is much less sensitive to warpage. Moreover, the substrate CTE affects the warpage of a package only with noncompliant underfills, while a typical substrate elastic modulus (ranging from 10 to 30 GPa) is insensitive to warpage, unless its value is lower than a few gigapascals.
引用
收藏
页码:419 / 424
页数:6
相关论文
共 14 条
[1]  
CHIU C, 2007, P 57 EL COMP TECHN C, P22
[2]   Warpage measurement comparison using shadow moire and projection moire methods [J].
Ding, H ;
Powell, RE ;
Hanna, CR ;
Ume, IC .
IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES, 2002, 25 (04) :714-721
[3]  
Ganesan S., 2006, LEAD FREE ELECT
[4]  
Lau J.H., 2000, LOW COST FLIP CHIP T
[5]  
Lau J.H., 2003, ELECT MANUFACTURING
[6]  
LEE CK, 2006, P IEMT PUTR MAL, P185
[7]   Predictive model for optimized design parameters in flip-chip packages and assemblies [J].
Park, Seungbae ;
Lee, H. C. ;
Sammakia, Bahgat ;
Raghunathan, Karthik .
IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES, 2007, 30 (02) :294-301
[8]  
Post D., 1993, High Sensitivity Moir Experimental Analysis for Mechanics and Materials
[9]  
SUHIR E, 1987, P 37 EL COMP C IEEE, P508
[10]   Correlation between measurement and simulation of thermal warpage in PBGA with consideration of molding compound residual strain [J].
Tsai, Ming-Yi ;
Chen, Yu-C. ;
Lee, S. W. Ricky .
IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES, 2008, 31 (03) :683-690