A Calibrated Pathfinding Model for Signal Integrity Analysis on Interposer

被引：0

作者：

Kim, Jaemin ^{[1
]}

Kim, Sunyoung ^{[1
]}

Ryckaert, Julien ^{[1
]}

Detalle, Mikael ^{[1
]}

Van Hoovels, Nele ^{[1
]}

Marchal, Pol ^{[1
]}

机构：

[1] IMEC, Louvain, Belgium

来源：

2012 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC) | 2012年

关键词：

RLC INTERCONNECTS; INDUCTANCE; INSERTION;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A calibrated pathfinding on silicon interposer is presented for exploring the impact of interconnect geometries on signal integrity. ABCD matrix-based model and single bit method are used for the pathfinding by estimating the worst-case eye opening. Experiment-based eye-diagrams using measured S-parameters on the fabricated silicon interposer are compared with the pathfinding showing 6% max difference. The pathfinding utilizes to optimize design parameters with 99% reduce of simulation time. It also extends for the optimization of parameters in multi interconnects considering mutual effects as well as crosstalk.

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页数：4

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