A Digital Background Calibration Algorithm of Time-Interleaved ADC

被引:0
|
作者
Yin, Yongsheng [1 ]
Li, Jiayu [1 ]
Chen, Hongmei [1 ]
机构
[1] Hefei Univ Technol, Inst VLSI Design, Hefei, Peoples R China
关键词
TIADC; Interpolation Filter; LMS; Hardware;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a background calibration algorithm based on the interpolation filter and the Least Mean Square (LMS) algorithm, taking the 5-channel Time-Interleaved Analog to Digital Converter(TIADC) as the model. And the algorithm is verified by the Simulink modeling and hardware. Comparing the spectra of the signals before and after calibration in the Simulink model, the ENOB rises from 3.62446 to 7.67697 and the SNR rises from 23.5815dB to 43.1738dB when the frequency of the input signal f(in) = 29.8MHz While f(in) = 59.8MHz, the ENOB rises from 3.62009 to 7.48092 and the SNR rises from 23.5552dB to 43.1929dB. Therefore, the correctness and the effectiveness of the algorithm have been verified.
引用
收藏
页码:64 / 67
页数:4
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