Design of New Low-Power High-Performance Full Adder with New XOR-XNOR Circuit

This paper, presents a new design for 1-bit full adder cell using hybrid-CMOS logic style. The new full adder is based on a novel XOR-XNOR circuit that generates XOR and XNOR full-swing outputs simultaneously and outperforms its best counterpart showing 43% improvement in power-delay product (PDP). The proposed full adder provides full-swing output with good driving capability and it is a proper choice for low-voltage applications. According to the simulation results, the proposed full adder has the best power consumption, propagation delay, and PDP, such that the power-delay product of the proposed full adder is 30% better than the next best PDP. HSPICE simulations using TSMC 0.18 mu m technology with a power supply of 1.8V was utilized to evaluate the performance of the circuits.