Timing Mismatch Background Calibration for Time-Interleaved ADCs

被引：0
|
作者：
Tang, Tzu-Yi [1 ]
Tsai, Tsung-Heng [1 ]
Chen, Kevin [2 ]
机构：
[1] Natl Chung Cheng Univ, Dept Elect Engn, Chiayi, Taiwan
[2] Ind Technol Res Inst, Informat & Communicat Res Labs, Hsinchu, Taiwan
来源：
TENCON 2012 - 2012 IEEE REGION 10 CONFERENCE: SUSTAINABLE DEVELOPMENT THROUGH HUMANITARIAN TECHNOLOGY | 2012年
关键词：
TO-DIGITAL CONVERTER; BLIND CALIBRATION;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Time-interleaved analog-to-digital converters (TIADCs) are essential in wide-band communication systems for providing high-speed data conversion. However, TIADCs are sensitive to the sample time mismatch, which results in significantly degraded performance. A new calibration technique is proposed to minimize sample time mismatches among interleaved channels. Correlation between adjacent channels based on zero-crossing detection is utilized. The proposed calibration technique does not require any extra reference signal. Simulation results show that the proposed compensation technique is validated with a high degree of accuracy. For a 4-channel 6-bit TIADC, the undesired spectrum is reduced to below -48dB.
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页数：4
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