Low-Voltage Back-Gated Atmospheric Pressure Chemical Vapor Deposition Based Graphene-Striped Channel Transistor with High-κ Dielectric Showing Room-Temperature Mobility > 11 000 cm2/V.s

被引:17
作者
Smith, Casey [1 ]
Qaisi, Ramy [1 ]
Liu, Zhihong [2 ]
Yu, Qingkai [2 ]
Hussain, Muhammad Mustafa [1 ]
机构
[1] King Abdullah Univ Sci & Technol, Integrated Nanotechnol Lab, Elect Engn Program, Comp Elect Math Sci & Engn Div, Thuwal 239556900, Saudi Arabia
[2] Texas State Univ, Ingram Sch Engn, San Marcos, TX USA
关键词
graphene; striped channel; back-gate; high-kappa; Al2O3; mobility; BANDGAP; FILMS; RAMAN;
D O I
10.1021/nn400796b
中图分类号
O6 [化学];
学科分类号
0703 ;
摘要
Utilization of graphene may help realize innovative low-power replacements for III-V materials based high electron mobility transistors while extending operational frequencies closer to the THz regime for superior wireless communications, imaging, and other novel applications. Device architectures explored to date suffer a fundamental performance roadblock due to lack of compatible deposition techniques for nanometer-scale dielectrics required to efficiently modulate graphene transconductance (g(m)) while maintaining low gate capacitance-voltage product (CgsVgs). Here we show integration of a scaled (10 nm) high-kappa gate dielectric aluminum oxide (Al2O3) with an atmospheric pressure chemical vapor deposition (APCVD)-derived graphene channel composed of multiple 0.25 mu m stripes to repeatedly realize room-temperature mobility of 11 000 cm(2)/N.s or higher. This high performance is attributed to the APCVD graphene growth quality, excellent interfacial properties of the gate dielectric, conductivity enhancement in the graphene stripes due to low t(ox)/W-graphene ratio, and scaled high-kappa dielectric gate modulation of carrier density allowing full actuation of the device with only +/- 1 V applied bias. The superior drive current and conductance at V-dd = 1 V compared to other top-gated devices requiring undesirable seed (such as aluminum and poly vinyl alcohol)-assisted dielectric deposition, bottom gate devices requiring excessive gate voltage for actuation, or monolithic (nonstriped) channels suggest that this facile transistor structure provides critical insight toward future device design and process integration to maximize CVD-based graphene transistor performance.
引用
收藏
页码:5818 / 5823
页数:6
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