Cascoded Ring Amplifiers for High Speed and High Accuracy Settling

被引:0
|
作者
Lee, Calvin Yoji [1 ]
Venkatachala, Praveen Kumar [1 ]
ElShater, Ahmed [1 ]
Xiao, Bohui [1 ]
Hu, Hang [1 ]
Moon, Ku [1 ]
机构
[1] Oregon State Univ, Sch Elect & Comp Engn, Corvallis, OR 97331 USA
来源
2019 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2019年
关键词
ring amplifier; dynamic bias; switched capacitor amplifier; high resolution ADC;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a method of biasing high gain ring amplifiers with cascoded output stages while retaining the high slew capability of the ring amplifier. The proposed method biases all devices in the output stage using voltages from the previous stage made available by a resistor ladder. Transistor level simulations of a ring amplifier in a 65nm CMOS process are presented showing 80dB settling accuracy within 2ns. The design is used in a switched capacitor amplification configuration with a closed loop gain of 64.
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页数:5
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