Frequency-to-digital conversion based on a sampled Phase-Locked Loop

被引:12
作者
Colodro, Francisco [1 ]
Torralba, Antonio [1 ]
机构
[1] Escuela Super Ingenieros, Dpto Ingn Elect, Seville 41092, Spain
关键词
Frequency-to-digital; Frequency Discriminator; Phase-locked loop; Sigma-Delta modulation; MODULATORS;
D O I
10.1016/j.mejo.2013.02.003
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new Frequency-to-Digital (F2D) converter based on a Phase-Locked Loop (PLL) is presented in this paper where the square wave at the output of a Voltage Controlled Oscillator (which is also the PLL output) is sampled and fed back to one of the Phase-Frequency Detector inputs. This sampled output is digitally processed and the information carried in its frequency is converted to a digital signal by means of a digital differentiator. Theoretical analyses and system-level simulations show that the errors produced by the sampling are shaped by a high-order transfer function in the same way as quantization errors are shaped in a Sigma-Delta Modulator. In addition, transistor-level simulations show a low sensitivity to non-linear circuit errors. The proposed F2D converter is suitable for integration in modern nanometer CMOS technologies, and can be used as an FM demodulator. (C) 2013 Elsevier Ltd. All rights reserved.
引用
收藏
页码:880 / 887
页数:8
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