Design and Research of SOPC Embedded Digital Frequency Meter Based on FPGA

The paper proposed a design scheme about the SOPC embedded digital frequency meter which based on the programmable chip system. The design adopts FPGA of the Cyclone series as the core and embedds the 8051 IP core as the MCU to complete the generation and detection of the system frequency. The digital frequency meter system uses Bresenham algorithm to produce appointed frequency and uses the measuring method of measuring frequency and the measuring of the week to complete the frequency measurements. The range of frequency determination is 0.1Hz-10MHz. The whole system designs miniaturization and uses single chip to complete the mainly logical functions of the system. The system runs stably and has an important role for application of the SOPC technology in the industrial design.