A Junctionless Nanowire Transistor With a Dual-Material Gate

被引：149

作者：

Lou, Haijun ^{[1
]}

Zhang, Lining ^{[3
]}

Zhu, Yunxi ^{[1
]}

Lin, Xinnan ^{[1
]}

Yang, Shengqi ^{[4
]}

He, Jin ^{[2
]}

Chan, Mansun ^{[5
]}

机构：

[1] Peking Univ, Sch Comp & Informat Engn, Key Lab Integrated Microsyst, Shenzhen Grad Sch, Shenzhen 518055, Peoples R China

[2] Peking Univ, Shenzhen SOC Key Lab, PKU HKUST Shenzhen HongKong Inst, Shenzhen 518057, Peoples R China

[3] Peking Univ, Sch Elect Engn & Comp Sci, TSRC, Inst Microelect, Beijing 100871, Peoples R China

[4] Shanghai Univ, Sch Commun & Informat Engn, SoC R&D Ctr, Shanghai 200072, Peoples R China

[5] Hong Kong Univ Sci & Technol, Dept ECE, Fac Elect & Comp Engn, Kowloon, Hong Kong, Peoples R China

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2012年 / 59卷 / 07期

关键词：

Dual-material gate (DMG); junctionless; nanowire; numerical simulation; single-material gate (SMG); WORK FUNCTION; METAL GATE; DEVICE ARCHITECTURE; CMOS TECHNOLOGY; MOSFET; PERFORMANCE; ATTRIBUTES; CIRCUITS;

D O I：

10.1109/TED.2012.2192499

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A dual-material-gate junctionless nanowire transistor (DMG-JNT) is proposed in this paper. Its characteristic is demonstrated and compared with a generic single-material-gate JNT using 3-D numerical simulations. The results show that the DMG-JNT has a number of desirable features, such as high ON-state current, a large ON/OFF current ratio, improved transconductance G(m), high unity-gain frequency f(T), high maximum oscillation frequency f(MAX), and reduced drain-induced barrier lowering. The effects of different control gate ratios Ra and varied work-function differences between the two gates are studied. Finally, the optimization of Ra and the work-function difference for the proposed DMG-JNT is presented.

引用

页码：1829 / 1836

页数：8

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