A 0.55-V, 28-ppm/°C, 83-nW CMOS Sub-BGR With UltraLow Power Curvature Compensation

被引:35
作者
Liu, Lianxi [1 ]
Mu, Junchao [2 ]
Zhu, Zhangming [1 ]
机构
[1] Xidian Univ, Sch Microelect, Key Lab Wide Band Gap Semicond Mat & Devices, Xian 710071, Shaanxi, Peoples R China
[2] Xidian Univ, Sch Microelect, Xian 710071, Shaanxi, Peoples R China
基金
中国国家自然科学基金;
关键词
Ultra-low Power; low voltage; bandgap reference; curvature compensation; self-powered device; switch capacitor; SUBTHRESHOLD VOLTAGE REFERENCE; BANDGAP REFERENCE; REFERENCE CIRCUIT; PPM/DEGREES-C; REFERENCES; NW;
D O I
10.1109/TCSI.2017.2711923
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper proposes an ultralow power, high precision sub bandgap voltage reference (sub-BGR) for low-voltage self-powered devices. A novel ultralow power curvature compensation circuit is proposed to improve the temperature coefficient over a wide temperature range. A switch capacitor voltage divider with improved leakage current reduction switches is used to obtain a high accuracy and a low power. To minimize the clock feedthrough and charge injection in the switches, a clock scaling down circuit is proposed, that effectively improves the line sensitivity (LS) of the sub-BGR. The proposed sub-BGR is implemented in a 0.18-mu m standard CMOS process with a total area of 0.061 mm(2). After measuring 30 chips, the average power consumption is 83 nW at 0.55 V of supply at 27 degrees C. In the supply voltage range of 0.55 to 1 V, the LS is 0.059%/V, and the error is +/- 0.75% (3 sigma) after trimming.
引用
收藏
页码:95 / 106
页数:12
相关论文
共 29 条
[1]  
[Anonymous], 1994, IEEE J SOLID STATE C, DOI DOI 10.1109/4.328634
[2]   A CMOS bandgap reference circuit with sub-1-V operation [J].
Banba, H ;
Shiga, H ;
Umezawa, A ;
Miyaba, T ;
Tanzawa, T ;
Atsumi, S ;
Sakui, K .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (05) :670-674
[3]   SIMPLE 3-TERMINAL IC BANDGAP REFERENCE [J].
BROKAW, AP .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (06) :388-393
[4]   A Sub-1 ppm/°C Precision Bandgap Reference With Adjusted-Temperature-Curvature Compensation [J].
Chen, Hou-Ming ;
Lee, Chang-Chi ;
Jheng, Shih-Han ;
Chen, Wei-Chih ;
Lee, Bo-Yi .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017, 64 (06) :1308-1317
[5]   A 1.2-V 4.2-ppm/°C High-Order Curvature-Compensated CMOS Bandgap Reference [J].
Duan, Quanzhen ;
Roh, Jeongjin .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2015, 62 (03) :662-670
[6]  
Hong-Wei Huang, 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers
[7]   A 5.6 ppm/°C Temperature Coefficient, 87-dB PSRR, Sub-1-V Voltage Reference in 65-nm CMOS Exploiting the Zero-Temperature-Coefficient Point [J].
Jiang, Jize ;
Shu, Wei ;
Chang, Joseph S. .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2017, 52 (03) :623-633
[8]   A Subthreshold Voltage Reference With Scalable Output Voltage for Low-Power IoT Systems [J].
Lee, Inhee ;
Sylvester, Dennis ;
Blaauw, David .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2017, 52 (05) :1443-1449
[9]   A Sub-μW Bandgap Reference Circuit With an Inherent Curvature-Compensation Property [J].
Lee, Kin Keung ;
Lande, Tor Sverre ;
Hafliger, Philipp Dominik .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2015, 62 (01) :1-9
[10]  
Lee L., 2015, IEEE ISSCC, P100