A High-Resolution Time-Based Resistance-to-Digital Converter with TDC and Counter

被引:0
|
作者
Nakagawa, Shuya [1 ]
Horikoshi, Kaito [1 ]
Ishikuro, Hiroki [1 ]
机构
[1] Keio Univ, Dept Elect Engn, Yokohama, Kanagawa, Japan
关键词
Time-based ADC; time-to-digital conveter; resistance-to-digital converter; sensor;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a high resolution time-based resistance-to-digital converter for amp-less high-precision sensor application. In order to solve the trade-off between resolution and bandwidth, a time-to-digital converter (TDC) is combined with a resistance-controlled-oscillator. The TDC is used to measure the fractional part of oscillation period, which realize a high resolution and conversion rate with moderate oscillation frequency. Proposed fractional period estimation technique reduce the required number of TDC and save power consumption. A prototype system was developed and 23 ppm resolution of resistance change at conversion rate of 5kSps was experimentally demonstrated.
引用
收藏
页码:242 / 245
页数:4
相关论文
共 50 条
  • [41] A New High-resolution, Temperature-compensated Cyclic Time-to-Digital Converter
    Wu, Sau-Mou
    Li, Min-Hau
    ISOCC: 2008 INTERNATIONAL SOC DESIGN CONFERENCE, VOLS 1-3, 2008, : 82 - 85
  • [42] A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line
    Dudek, P
    Szczepanski, S
    Hatfield, JV
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2000, 35 (02) : 240 - 247
  • [43] A High-Resolution Pipeline Time-to-Digital Converter in 0.18μm CMOS Technology
    Wang, Yongsheng
    Ye, Qiao
    Zhao, Han
    Liu, Xiaowei
    2017 IEEE 12TH INTERNATIONAL CONFERENCE ON ASIC (ASICON), 2017, : 624 - 627
  • [44] A high-resolution, linear resistance-to-frequency converter
    Mochizuki, K
    Watanabe, K
    IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 1996, 45 (03) : 761 - 764
  • [45] 62.5 ps LSB resolution multiphase clock Time to Digital Converter (TDC) implemented on FPGA
    Mattada M.
    Guhilot H.
    Journal of King Saud University - Engineering Sciences, 2022, 34 (06): : 418 - 424
  • [46] A High-Resolution (< 10 ps RMS) 48-Channel Time-to-Digital Converter (TDC) Implemented in a Field Programmable Gate Array (FPGA)
    Bayer, Eugen
    Traxler, Michael
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2011, 58 (04) : 1547 - 1552
  • [47] Analysis of a Sigma-Delta Resistance-to-Digital Converter for Differential Resistive Sensors
    Mohan, N. Madhu
    George, Boby
    Kumar, V. Jagadeesh
    IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2009, 58 (05) : 1617 - 1622
  • [48] A HIGH-RESOLUTION TDC IN TKO BOX SYSTEM
    SASAKI, O
    TANIGUCHI, T
    OHSKA, TK
    KURASHIGE, H
    TANIGUCHI, T
    OHSKA, TK
    KURASHIGE, H
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1988, 35 (01) : 342 - 345
  • [49] Design Techniques for Linearity in Time-Based ΣΔ Analog-to-Digital Converter
    Amin, Mohamed
    Leung, Bosco
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2016, 63 (05) : 433 - 437
  • [50] A time-based energy-efficient analog-to-digital converter
    Yang, HY
    Sarpeshkar, R
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2005, 40 (08) : 1590 - 1601