Design of UWB LNA in 45nm CMOS technology: Planar bulk vs. FinFET

被引：2
|
作者：
Ponton, D. [1 ,2 ]
Palestri, P. [1 ]
Esseni, D. [1 ]
Selmi, L. [1 ]
Tiebout, M. [2 ]
Parvais, B. [3 ]
Knoblinger, G. [2 ]
机构：
[1] Univ Udine, DIEGM, Via Sci 208, I-33100 Udine, Italy
[2] Infineon Technol Austria, DCV, A-9500 Villach, Austria
[3] IMEC, B-3001 Louvain, Belgium
来源：
PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10 | 2008年
关键词：
D O I：
10.1109/ISCAS.2008.4542014
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper describes the design of a single-stage differential Low Noise Amplifier (LNA) for Ultra Wide Band(UWB) applications, implemented in state of the art Planar and FinFET 45nm CMOS technologies. A g(m)-boosted topology has been chosen and the LNA has been designed to work over the whole UWB band (3.1 - 10.6GHz), while driving a capacitive load. The simulations highlight that, at the present stage of the technology development, the Planar version of the LNA outperforms the FinFET one thanks to the superior cutoff frequency f(T) of Planar devices in the inversion region, achieving comparable Noise Figure and voltage gain, but consuming less power.
引用
收藏
页码：2701 / +
页数：2
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