A 533-MHz BiCMOS superscalar RISC microprocessor

被引:8
作者
Maier, CA [1 ]
Markevitch, JA [1 ]
Brashears, CS [1 ]
Sippel, T [1 ]
Cohen, ET [1 ]
Blomgren, J [1 ]
Ballard, JG [1 ]
Pattin, J [1 ]
Moldenhauer, V [1 ]
Thomas, JA [1 ]
Taylor, G [1 ]
机构
[1] EXPONENTIAL TECHNOL, SAN JOSE, CA 95131 USA
关键词
BiCMOS integrated circuits; bipolar digital integrated circuits; emitter coupled logic; microprocessors;
D O I
10.1109/4.641683
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This 533-MHz BiCMOS very large scale integration (VLSI) implementation of the PowerPC architecture contains three pipelines and a large on-chip secondary cache to achieve a peak performance of 1600 MIPS, The 15 mm x 10 mm die contains 2.7M transistors (2M CMOS and 0.7M bipolar) and dissipates less than 85 W, The die is fabricated in a six-level metal, 0.5-mu m BiCMOS process and requires 3.6 and 2.1 V power supplies.
引用
收藏
页码:1625 / 1634
页数:10
相关论文
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