共 50 条
- [31] A 3.3-mW LOW PHASE NOISE VCDL FOR FACTORIAL DELAY-LOCKED LOOPS PROCEEDINGS OF 2019 36TH NATIONAL RADIO SCIENCE CONFERENCE (NRSC), 2019, : 299 - 304
- [34] Analysis and Optimization of Waveform-Dependent UWB Timing Synchronization by Delay-Locked Loops 2019 6TH INTERNATIONAL CONFERENCE ON CONTROL, DECISION AND INFORMATION TECHNOLOGIES (CODIT 2019), 2019, : 320 - 325
- [35] Analysis of jitter peaking and jitter accumulation in re-circulating delay-locked loops 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2005, : 2255 - 2258
- [37] A Novel Charge Pump with Low Current for Low-Power Delay-Locked Loops Circuits, Systems, and Signal Processing, 2017, 36 : 3514 - 3526
- [38] Steady-state analysis of delay-locked loops tracking binary Markovian sequences IEICE NONLINEAR THEORY AND ITS APPLICATIONS, 2010, 1 (01): : 153 - 165
- [39] Analysis of jitter peaking and jitter accumulation in re-circulating delay-locked loops Torkzadeh, P. (p_torkzadeh@ee.sharif.edu), Circuits and Systems Society, IEEE CASS; Science Council of Japan; The Inst. of Electronics, Inf. and Communication Engineers, IEICE; The Institute of Electrical and Electronics Engineers, Inc., IEEE (Institute of Electrical and Electronics Engineers Inc.):
- [40] Computation of the lock-in ranges of phase-locked loops with PI filter IFAC PAPERSONLINE, 2016, 49 (14): : 36 - 41