A high-order curvature compensated voltage reference based on lateral BJT

被引：12
作者：
Liu, Xifeng [1 ]
Yang, Shiwei [2 ]
Wang, Jinfei [1 ]
Xu, Zhenbang [1 ]
机构：
[1] Jiangsu Coll Informat Technol, Sch Elect & Commun Engn, Wuxi 214153, Jiangsu, Peoples R China
[2] Sultan Idris Educ Univ, Sch Comp & Creat Ind, Tanking Malin 35900, Malaysia
来源：
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS | 2020年 / 124卷
关键词：
Lateral BJT; Curvature compensation; Subtraction circuit; Voltage reference; PSRR; CMOS BANDGAP REFERENCE; PPM/DEGREES-C; SUBTHRESHOLD VOLTAGE; BGR; TC;
D O I：
10.1016/j.aeue.2020.153325
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents a curvature compensated voltage reference (VR), which is based on lateral PNP bipolar junction transistor (BJT). The proposed VR is fabricated in 0.18 mu m CMOS process. The circuit consists of two first-order current-mode band gap references (BGR) and a subtraction circuit. Temperature characteristics of lateral PNP BJT is utilized for temperature curvature compensation. Moreover, in order to reduce the errors introduced by the conventional subtraction circuit, an improved subtraction circuit is proposed for improving performance of curvature compensation. Test results of prototype chips show the proposed VR has an average 2.36 ppmj degrees C within temperature range of -40 degrees C to 120 degrees C. Power supply rejection ratio (PSRR) of the proposed VR achieves 69.5 dB at 100 Hz. (C) 2020 Elsevier GmbH. All rights reserved.
引用
收藏
页数：11
相关论文
共 31 条
[1]   A Novel Wide-Temperature-Range, 3.9 ppm/°C CMOS Bandgap Reference Circuit [J].
Andreou, Charalambos M. ;
Koudounas, Savvas ;
Georgiou, Julius .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2012, 47 (02) :574-581
[2]   A CMOS bandgap reference circuit with sub-1-V operation [J].
Banba, H ;
Shiga, H ;
Umezawa, A ;
Miyaba, T ;
Tanzawa, T ;
Atsumi, S ;
Sakui, K .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (05) :670-674
[3]   A 0.4-V Supply Curvature-Corrected Reference Generator With 84.5-ppm/°C Average Temperature Coefficient Within-40 °C to 130 °C [J].
Basyurt, Pinar Basak ;
Bonizzoni, Edoardo ;
Aksin, Devrim Yilmaz ;
Maloberti, Franco .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2017, 64 (04) :362-366
[4]   Second-order compensation BGR with low TC and high performance for space applicationsnn [J].
Calvillo, Jonathan P. ;
Povoa, Ricardo ;
Guilherme, Jorge ;
Horta, Nuno .
INTEGRATION-THE VLSI JOURNAL, 2018, 63 :256-265
[5]   A Sub-1 ppm/°C Precision Bandgap Reference With Adjusted-Temperature-Curvature Compensation [J].
Chen, Hou-Ming ;
Lee, Chang-Chi ;
Jheng, Shih-Han ;
Chen, Wei-Chih ;
Lee, Bo-Yi .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017, 64 (06) :1308-1317
[6]   A 1.2-V 4.2-ppm/°C High-Order Curvature-Compensated CMOS Bandgap Reference [J].
Duan, Quanzhen ;
Roh, Jeongjin .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2015, 62 (03) :662-670
[7]   A Single-Trim CMOS Bandgap Reference With a 3σ Inaccuracy of ±0.15% From-40°C to 125°C [J].
Ge, Guang ;
Zhang, Cheng ;
Hoogzaad, Gian ;
Makinwa, Kofi A. A. .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2011, 46 (11) :2693-2701
[8]   A 1-V, 16.9 ppm/°C, 250 nA Switched-Capacitor CMOS Voltage Reference [J].
Hsieh, Chun-Yu ;
Huang, Hong-Wei ;
Chen, Ke-Horng .
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2011, 19 (04) :659-667
[9]   New curvature-compensation technique for CMOS bandgap reference with sub-1-V operation [J].
Ker, Ming-Dou ;
Chen, Jung-Sheng .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2006, 53 (08) :667-671
[10]   A Subthreshold Voltage Reference With Scalable Output Voltage for Low-Power IoT Systems [J].
Lee, Inhee ;
Sylvester, Dennis ;
Blaauw, David .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2017, 52 (05) :1443-1449
1234