On test and characterization of analog linear time-invariant circuits using neural networks

被引:1
|
作者
Guo, Z [1 ]
Zhang, XM [1 ]
Savir, J [1 ]
Shi, YQ [1 ]
机构
[1] New Jersey Inst Technol, Dept Elect & Comp Engn, Newark, NJ 07102 USA
来源
10TH ASIAN TEST SYMPOSIUM, PROCEEDINGS | 2001年
关键词
neural network; fault detection; charecterization; system on a chip;
D O I
10.1109/ATS.2001.990306
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Testing and characterization of analog circuits is a very important task in the VLSI manufacturing process, However, no efficient methodology exists on how to effectively model and characterize the various faults, and even how to dectect their existence, Neural networks have been successfully applied to various pattern recognition problems. In this paper, the amplitude and temporal characteristics of the good circuit response are used to train a neural network, so that it is able to distinguish between different faulty circuit responses. A Time-Delay Neural Network (TDNN) is proposed as a possible vehicle for performing the test and diagnosis.
引用
收藏
页码:338 / 343
页数:6
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