Design of a CMOS T/R Switch With High Power Capability: Using Asymmetric Transistors

被引:9
作者
Liu, Szu-Ling [1 ,2 ,3 ]
Wu, Meng-Hsiu [1 ,2 ]
Chin, Albert [1 ,2 ]
机构
[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 30010, Taiwan
[2] Natl Chiao Tung Univ, Inst Elect, Hsinchu 30010, Taiwan
[3] Taiwan Semicond Mfg Co Ltd, Hsinchu 300, Taiwan
关键词
BVdss; insertion loss; isolation; power-handling capability;
D O I
10.1109/LMWC.2012.2227465
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A single-pole double-throw transmit/receive (T/R) switch has been realized by using both conventional and asymmetric MOSFETs in a standard 0.18 mu m CMOS technology. At 2.4 and 5.8 GHz, the asymmetric-transistor based T/R switch shows 2.7 dBm and 2.3 dBm improvements in measured 1 dB compression points (P(1 dB)s) than the conventional circuit of the same circuitry and layout, respectively. This switch also has good insertion losses of 0.62/0.7 and 0.94/1.2 dB for transmit-end/receive-end modes at 2.4 and 5.8 GHz, respectively.
引用
收藏
页码:645 / 647
页数:3
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