Passive mixer with OPA filter for DVB-H front-end in 65 nm digital CMOS technology

被引:2
|
作者
Schweiger, Kurt [1 ]
Zimmermann, Horst [1 ]
机构
[1] Vienna Univ Technol, Inst Electrodynam Microwave & Circuit Engn, A-1040 Vienna, Austria
关键词
Analog circuit design; Nanometer CMOS; Mixer; DVB-H; Clock regeneration;
D O I
10.1016/j.mejo.2012.10.003
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a passive mixer combined with a 1st-order active low-pass filter implemented in a purely digital low-power 65 nm CMOS technology. The filter consists of a four-stage operational amplifier with two feed-forward paths for a 3 dB corner frequency of 4 MHz. The mixer offers a very low flicker noise corner frequency of 80 Hz for DVB-H application. A fabricated test chip with integrated clock regeneration circuit offers even for a very small clock input signal amplitude a maximum gain of 26 dB. The combination offers an IIP3 of -5 dBm while the mixer consumes 12.27 mA and the filter 4.42 mA from a 1.25 V supply. (C) 2012 Elsevier Ltd. All rights reserved.
引用
收藏
页码:975 / 979
页数:5
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