The performance of solid-state dc circuit breaker (SS-DCCB) is mainly determined by the ON-state feature of power device. In this article, an optimized low ON-state voltage integrated gate-commutated thyristor (LO-IGCT) for SS-DCCB is developed. First, the impacts of device parameters, including base length, carrier lifetime, and emitter injection efficiencies, on ON-state voltage are presented. The boundary conditions raised by blocking voltage and safe operation area (SOA) are analyzed. Based on that, a three-step blocking-SOA-emitter optimization routine is proposed. Then, the optimization methodology for doping profiles in different regions, especially in n-drift, n buffer, p+ base, n+ emitter, and p+ emitter regions, is presented. The optimal values are derived with theoretical deduction or numerical calculation. After that, based the optimization result, samples of LO-IGCTs are fabricated and tested. The fabricated LO-IGCT sample shows a blocking voltage capability over 4500 V and an ON-state voltage of 1.11 V at the current of 2000 A. The commercialized IGCT and IGBT optimized for high-frequency applications exhibits 1.23 and 1.85 times the ON-state voltage under the same test configuration.