共 50 条
- [1] A NEW HARDWARE FRIENDLY 2D-DCT HEVC COMPLIANT ALGORITHM AND ITS HIGH THROUGHPUT AND LOW POWER HARDWARE DESIGN 2019 26TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 2019, : 654 - 657
- [2] A Low Energy HEVC Inverse DCT Hardware 2013 IEEE THIRD INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS - BERLIN (ICCE-BERLIN), 2013,
- [3] A New Algorithm to Derive Hardware Efficient Integer Discrete Cosine Transform for HEVC 2020 ASIA-PACIFIC SIGNAL AND INFORMATION PROCESSING ASSOCIATION ANNUAL SUMMIT AND CONFERENCE (APSIPA ASC), 2020, : 6 - 10
- [4] High Performance Integer DCT Architectures for HEVC 2017 30TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2017 16TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID 2017), 2017, : 121 - 126
- [6] High-Performance Multiplierless DCT architecture for HEVC 2015 19TH INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AND TEST (VDAT), 2015,
- [8] Simplified HEVC FME Interpolation Unit Targeting a Low Cost and High Throughput Hardware Design 2013 DATA COMPRESSION CONFERENCE (DCC), 2013, : 473 - 473
- [9] HIGH-THROUGHPUT AND LOW-COST HARDWARE-ORIENTED INTEGER TRANSFORMS FOR HEVC 2014 IEEE INTERNATIONAL CONFERENCE ON IMAGE PROCESSING (ICIP), 2014, : 2105 - 2109
- [10] High-Level Synthesis Hardware Implementation and Verification of HEVC DCT on SoC-FPGA 2017 13TH INTERNATIONAL COMPUTER ENGINEERING CONFERENCE (ICENCO), 2017, : 361 - 365