La Doped Layered Structure low-voltage ZnO Varistor

Double-layered, low-voltage ZnO varistors (including layer A and layer B) have been fabricated by feeding two kinds of ZnO powders into a die using dry extrusion molding. The samples are examined by using energy dispersive X-ray spectroscopy (EDS), electron probe microanalysis (EPMA), scanning electron microscope (SEM) and DC electrical measurements. EDS and EPMA data indicate that doped elements only exists in layer A, the results of SEM indicated that secondary phases are formed at grain boundaries in layer A, not found in layer B. It is found that the electrical properties of low-voltage varistor are improved without reducing thickness and changing energy absorption capabilities. The higher nonlinearity coefficients, the lower breakdown fields and leakage currents of layered structure low-voltage ZnO varistor, as compared to those of ZnO varistor fabricated from the conventional route. The improved current-voltage properties are attributed to the band structure difference in both sides of grains, due to the different ion concentration and species in both sides of grain boundary. Double-layered structure varistor also has more simpler prepared technology than multilayer chip varistor.