Switched-diode structure for multilevel converter with reduced number of power electronic devices

被引:29
作者
Alishah, Rasoul Shalchi [1 ]
Nazarpour, Daryoosh [1 ]
Hosseini, Seyyed Hossein [2 ]
Sabahi, Mehran [2 ]
机构
[1] Urmia Univ, Fac Elect Engn, Orumiyeh, Iran
[2] Univ Tabriz, Fac Elect Engn, Tabriz, Iran
关键词
HARMONIC ELIMINATION; INVERTER; TOPOLOGY; PWM; REDUCTION;
D O I
10.1049/iet-pel.2013.0208
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
To reduce the number of power electronic devices in multilevel converters, a new switched-diode multilevel converter is proposed in this study. This topology generates a large number of levels with fewer number of insulated gate bipolar transistors (IGBTs), gate driver circuits and power diodes. For recommended multilevel converter, a novel method for determination of dc voltage sources magnitudes is presented. Also, the optimal structures is presented for different aims including less number of IGBTs, gate driver circuits, dc voltage sources and power diodes in order to generating a large number of levels. The proposed structure is compared with other topologies to reflect the merits of the proposed structure. The operation and performance of the proposed topology is verified by experimental and simulation results.
引用
收藏
页码:648 / 656
页数:9
相关论文
共 23 条
[1]   A five-level symmetrically defined selective harmonic elimination PWM strategy: Analysis and experimental validation [J].
Agelidis, Vassilios G. ;
Balouktsis, Anastasios I. ;
Dahidah, Mohamed S. A. .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2008, 23 (01) :19-26
[2]   Reduction of dc voltage sources and switches in asymmetrical multilevel converters using a novel topology [J].
Babaei, E. ;
Hosseini, S. H. ;
Gharehpetian, G. B. ;
Haque, M. Tarafdar ;
Sabahi, M. .
ELECTRIC POWER SYSTEMS RESEARCH, 2007, 77 (08) :1073-1085
[3]   New cascaded multilevel inverter topology with minimum number of switches [J].
Babaei, Ebrahim ;
Hosseini, Seyed Hossein .
ENERGY CONVERSION AND MANAGEMENT, 2009, 50 (11) :2761-2767
[4]   A Cascade Multilevel Converter Topology With Reduced Number of Switches [J].
Babaei, Ebrahim .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2008, 23 (06) :2657-2664
[5]   Z-source-based multilevel inverter with reduction of switches [J].
Banaei, M. R. ;
Dehghanzadeh, A. R. ;
Salary, E. ;
Khounjahan, H. ;
Alizadeh, R. .
IET POWER ELECTRONICS, 2012, 5 (03) :385-392
[6]   Control of a multilevel converter using resultant theory [J].
Chiasson, JN ;
Tolbert, LM ;
McKenzie, KJ ;
Du, Z .
IEEE TRANSACTIONS ON CONTROL SYSTEMS TECHNOLOGY, 2003, 11 (03) :345-354
[7]   Active harmonic elimination for multilevel converters [J].
Du, Z ;
Tolbert, LM ;
Chiasson, JN .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2006, 21 (02) :459-469
[8]   A New Multilevel Converter Topology With Reduced Number of Power Electronic Components [J].
Ebrahimi, Javad ;
Babaei, Ebrahim ;
Gharehpetian, Gevorg B. .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2012, 59 (02) :655-667
[9]   Selective harmonic elimination of new family of multilevel inverters using genetic algorithms [J].
El-Naggar, Khaled ;
Abdelhamid, Tamer H. .
ENERGY CONVERSION AND MANAGEMENT, 2008, 49 (01) :89-95
[10]   The Age of Multilevel Converters Arrives [J].
Franquelo, Leopoldo G. ;
Rodriguez, Jose ;
Leon, Jose I. ;
Kouro, Samir ;
Portillo, Ramon ;
Prats, Maria M. .
IEEE INDUSTRIAL ELECTRONICS MAGAZINE, 2008, 2 (02) :28-39