POSIX modeling in SystemC

Early estimation of the execution time of Real-Time embedded SW is an essential task in complex, HW/SW embedded system design. Application SW execution time estimation requires taking into account the impact of the underlying RTOS. As a consequence, RTOS modeling is becoming an active research area. SystemC provides a framework for multiprocessing, HW/SW co-simulation at several abstraction levels. In this paper, a SystemC library for POSIX modeling and simulation is presented. By using the library, the SystemC specification using POSIX functions is converted automatically into a timed simulation estimating the execution time of the application SW running on the POSIX platform. The library works directly on the source code. Therefore, it provides an early and fast estimation of the performance of the system as a consequence of the architectural mapping decisions. Although accuracy is lower than when using lower-level techniques, it supports high-level design-space exploration as simulation time is significantly less than RT (ISS) simulation(1).