Effect of gate engineering in double-gate MOSFETs for analog/RF applications

被引：157

作者：

Sarkar, Angsuman ^{[1
]}

Das, Aloke Kumar ^{[1
]}

De, Swapnadip ^{[2
]}

Sarkar, Chandan Kumar ^{[3
]}

机构：

[1] Kalyani Goverenment Engn Coll, Elect & Commun Engn Dept, Kalyani 741235, W Bengal, India

[2] Meghnad Saha Inst Technol, Dept Elect & Commun Engn, Kolkata 741235, W Bengal, India

[3] Jadavpur Univ, Elect & Telecommun Dept, Kolkata 700032, W Bengal, India

来源：

MICROELECTRONICS JOURNAL | 2012年 / 43卷 / 11期

关键词：

TM-DG MOSFET; Intrinsic gain; Transconductance generation factor (TGF); Cut-off frequency (f(r)); Maximum frequency of oscillation (f(max)); Gain bandwidth product; DUAL-METAL GATE; WORK-FUNCTION; SOI MOSFET; CMOS; PERFORMANCE; OPTIMIZATION; INTEGRATION; TRANSISTORS; CIRCUITS;

D O I：

10.1016/j.mejo.2012.06.002

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This work uncovers the potential benefit of fully-depleted short-channel triple-material double-gate (TM-DG) SOI MOSFET in the context of RF and analog performance characteristics. A systematic, quantitative investigation of the analog and RF performance figures-of-merits (FOMs) of TM-DG MOSFET are presented. The key idea in this paper is to demonstrate the improved RF, analog and linearity performance exhibited by TM-DG MOSFET over dual-material dual-gate (DM-DG) and conventional single-material double-gate (SM-DG) MOSFET. Using two-dimensional (2-D) device simulations, we have examined various design issues and provided the reasons for the improved performance. The effect of different length ratios of three channel regions related to three different gate materials of TM-DG structure on the RF and analog performance have also been discussed. Simulations reveal an improvement of intrinsic gain by 20.41% and 38.53%, an increase of 14.23% and 26.4% in the case of f(T), an increase of 13.9% and 23.85% in the case of f(max) values for TM-DG (1:2:3) MOSFET compared to DM-DG and SM-DG MOSFET respectively. As a result, we demonstrate that TM-DG MOSFET can be a viable option to enhance the performance of SOI technology for high-frequency analog applications. (C) 2012 Elsevier Ltd. All rights reserved.

引用

页码：873 / 882

页数：10

共 47 条

[31]

Razavi Pedram, 2008, 2008 International Conference on Advances in Electronics and Micro-electronics, P11, DOI 10.1109/ENICS.2008.33

[32] A new dual-material double-gate (DMDG) nanoscale SOI MOSFET - Two-dimensional analytical modeling and simulation [J].

Reddy, GV ;

Kumar, MJ .

IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2005, 4 (02) :260-268

[33] Investigation of the novel attributes of a single-halo double gate SOI MOSFET: 2D simulation study [J].

Reddy, GV ;

Kumar, MJ .

MICROELECTRONICS JOURNAL, 2004, 35 (09) :761-765

[34] A dual-metal gate integration process for CMOS with sub-1-nm EOT HfO2 by using HfN replacement gate [J].

Ren, C ;

Yu, HY ;

Kang, JF ;

Wang, XP ;

Ma, HHH ;

Yeo, YC ;

Chan, DSH ;

Li, MF ;

Kwong, DL .

IEEE ELECTRON DEVICE LETTERS, 2004, 25 (08) :580-582

[35]

Rogers J., 2003, ARTECH MICR

[36] Physics-based analytical modeling of potential and electrical field distribution in dual material gate (DMG)-MOSFET for improved hot electron effect and carrier transport efficiency [J].

Saxena, M ;

Haldar, S ;

Gupta, M ;

Gupta, RS .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2002, 49 (11) :1928-1938

[37] TCAD Assessment of Device Design Technologies for Enhanced Performance of Nanoscale DG MOSFET [J].

Sharma, Rupendra Kumar ;

Gupta, Mridula ;

Gupta, R. S. .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2011, 58 (09) :2936-2943

[38] Optimization of extrinsic source/drain resistance in ultrathin body double-gate FETs [J].

Shenoy, RS ;

Saraswat, KC .

IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2003, 2 (04) :265-270

[39]

Sze S.M., 2013, SEMICONDUCTOR DEVICE

[40]

Tiwari PK, 2010, J APPL PHYS, V108

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