A Noise-Coupled Time-Interleaved Delta-Sigma ADC With 4.2 MHz Bandwidth,-98 dB THD, and 79 dB SNDR

被引：48

作者：

Lee, Kyehyung ^{[1
]}

Chae, Jeongseok ^{[2
]}

Aniya, Mitsuru ^{[3
]}

Hamashita, Koichi ^{[3
]}

Takasuka, Kaoru ^{[3
]}

Takeuchi, Seiji ^{[3
]}

Temes, Gabor C. ^{[2
]}

机构：

[1] Conexant Syst, Newport Beach, CA 92660 USA

[2] Oregon State Univ, Sch Elect Engn & Comp Sci, Corvallis, OR 97331 USA

[3] Asahi Kasei EMD Corp, Kanagawa 24321, Japan

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2008年 / 43卷 / 12期

关键词：

Delta-sigma ADC; discrete-time; noise coupling; SC circuit; time interleaving;

D O I：

10.1109/JSSC.2008.2006311

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper describes a wideband high-linearity Delta Sigma ADC. It uses noise coupling combined with time interleaving. Two versions of a two-channel time-interleaved noise-coupled Delta Sigma ADC were realized in a 0.18-mu m CMOS technology. Noise coupling between the channels increases the effective order of the noise-shaping loops, provides dithering, and prevents tone generation in all loops. Time interleaving enhances the effects of noise coupling. Using a 1.5 V supply, the device achieved excellent linearity (SFDR > 100 dB, THD = -98 dB) and an SNDR of 79 dB in a 4.2 MHz signal band.

引用

页码：2601 / 2612

页数：12

共 29 条

[11]

FUJIMOTO Y, 2006, P IEEE ISSCC FEB, P76

[12] High-order multibit modulators and pseudo data-weighted-averaging in low-oversampling ΔΣ ADCs for broad-band applications [J].