A Gate-Induced Drain-Leakage Current Model for Fully Depleted Double-Gate MOSFETs

被引：3

作者：

Jin, Xiaoshi ^{[1
]}

Liu, Xi ^{[1
]}

Lee, Jong-Ho ^{[1
]}

机构：

[1] Kyungpook Natl Univ, Sch Elect Engn & Comp Sci, Taegu 702701, South Korea

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2008年 / 55卷 / 10期

关键词：

Double gate (DG); fully depleted; gate-induced drain leakage (GIDL); MOSFETs; separation of variables;

D O I：

10.1109/TED.2008.2003229

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A gate-induced drain-leakage current model which can avoid the invalidation of 1-D models for fully depleted double-gate MOSFETs was developed based on tunneling theory and the analytical solution of a 2-D Poisson equation. For a given device geometry and a doping concentration, assuming that the drain region was fully depleted, the 2-D Poisson equation is solved using a separation-of-variable technique with appropriate boundary conditions. The results were compared with the data from a 2-D device simulation and showed good agreement.

引用

页码：2800 / 2804

页数：5

共 11 条

[1]

Chan TY, 1987, IEDM TECH DIG, P718

[2] SUB-BREAKDOWN DRAIN LEAKAGE CURRENT IN MOSFET [J].

CHEN, J ;

CHAN, TY ;

CHEN, IC ;

KO, PK ;

HU, C .

IEEE ELECTRON DEVICE LETTERS, 1987, 8 (11) :515-517

[3] An analytic three-terminal band-to-band tunneling model on GIDL in MOSFET [J].

Chen, JH ;

Wong, SC ;

Wang, YH .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2001, 48 (07) :1400-1405

[4] A NEW RECOMBINATION MODEL FOR DEVICE SIMULATION INCLUDING TUNNELING [J].

HURKX, GAM ;

KLAASSEN, DBM ;

KNUVERS, MPG .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1992, 39 (02) :331-338

[5] ANOMALOUS OFF-CURRENT MECHANISMS IN N-CHANNEL POLY-SI THIN-FILM TRANSISTORS [J].

MIGLIORATO, P ;

REITA, C ;

TALLARIDA, G ;

QUINN, M ;

FORTUNATO, G .

SOLID-STATE ELECTRONICS, 1995, 38 (12) :2075-2079

[6]

Moll J. L., 1964, PHYSICS SEMICONDUCTO, P252

[7] A closed-form model for thermionic trap-assisted tunneling [J].

Sathaiya, D. Mahaveer ;

Karmalkar, Shreepad .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (02) :557-564

[8]

*SILVACO, 2005, ATLAS MAN

[9] A corapact model for polysilicon TFTs leakage current including the poole-frenkel effect [J].

Wu, W. J. ;

Yao, R. H. ;

Li, S. H. ;

Hu, Y. F. ;

Deng, W. L. ;

Zheng, X. R. .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2007, 54 (11) :2975-2983

[10] A capacitorless 1T-DRAM technology using gate-induced drain-leakage (GIDL) current for low-power and high-speed embedded memory [J].

Yoshida, E ;

Tanaka, T .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (04) :692-697

← 1 2 →