Implementation of Grid-Connected Cascaded Multi-Level Inverter Based on FPGA for Centralized Photovoltaic Generation

被引:7
作者
Chen, Jian [1 ]
Xu, Xianglian [1 ]
Li, Shunjie [1 ]
Hu, Ka [1 ]
Yu, Liang [1 ]
机构
[1] Wuhan Univ Technol, Sch Automat, Wuhan 430070, Peoples R China
来源
2012 INTERNATIONAL CONFERENCE ON FUTURE ELECTRICAL POWER AND ENERGY SYSTEM, PT B | 2012年 / 17卷
关键词
photovoltaic generation; FPGA; cascaded multi-level inverter; CPS-SPWM;
D O I
10.1016/j.egypro.2012.02.225
中图分类号
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号
0807 ; 0820 ;
摘要
This paper proposes a grid-connected cascaded multi-level inverter used in centralized photovoltaic generation. Field programmable gate array (FPGA) is applied to implement the multichannel Carrier Phase Shifting Sinusoidal Pulse Width Modulation(CPS-SPWM) strategy for the inverter. Analysis and practical implementation of the regular sampled three-phase CPS-SPWM waveform has been presented in this paper. An ALRERA FPGA chip is employed to fulfill all the function of modules, such as divider module, triangular carrier generation module, sine wave generation module, comparing module, dead time module and so on. The simulation and experimental results show that the presentation of this grid-connected cascaded multi-level inverter used in the photovoltaic generation system is feasible. (C) 2012 Published by Elsevier Ltd. Selection and/ or peer-review under responsibility of Hainan University.
引用
收藏
页码:1185 / 1192
页数:8
相关论文
共 9 条
[1]  
[Anonymous], 2009 IEEE 6 INT POW
[2]  
[Anonymous], 30 ANN C IEEE IND EL
[3]  
[Anonymous], IEEE INT S IND EL
[4]   A single-stage grid connected inverter topology for solar PV systems with maximum power point tracking [J].
Jain, Sachin ;
Agarwal, Vivek .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2007, 22 (05) :1928-1940
[5]  
Li J., 2009, SMTA International Conference Proceedings, P1
[6]  
Mekhilef S, 2002, 2002 IEEE REGION 10 CONFERENCE ON COMPUTERS, COMMUNICATIONS, CONTROL AND POWER ENGINEERING, VOLS I-III, PROCEEDINGS, P2079
[7]   Design and Implementation of an FPGA-Based High Performance ASIC for Open Loop PWM Inverter [J].
Nandhakumar, P. ;
Jeevananthan, S. ;
Dananjayan, P. .
INDIA INTERNATIONAL CONFERENCE ON POWER ELECTRONIC S, 2006, :349-+
[8]  
Rahim NA, 2002, POWERCON 2002: INTERNATIONAL CONFERENCE ON POWER SYSTEM TECHNOLOGY, VOLS 1-4, PROCEEDINGS, P570, DOI 10.1109/ICPST.2002.1053607
[9]  
Zang Chunyan, 2009, ICEMS INT C ELECT MA, P1