Analytical Modeling of Dual Material Gate All Around Stack Architecture of Tunnel FET

被引：11

作者：

Balamurugan, N. B. ^{[1
]}

Priya, G. Lakshmi ^{[2
]}

Manikandan, S. ^{[1
]}

Srimathi, G. ^{[1
]}

机构：

[1] Thiagarajar Coll Engn, Dept ECE, Madurai, Tamil Nadu, India

[2] Bannari Amman Inst Technol, Dept ECE, Erode, Tamil Nadu, India

来源：

2016 29TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2016 15TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID) | 2016年

关键词：

Dual Material Gate All Around; Gate Stack Architecture; Tunnel Field Effect Transistor; Short Channel Effects; Surface Potential; Electric Field; MOSFETS; SIMULATION;

D O I：

10.1109/VLSID.2016.74

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

An analytical model has been proposed to study the behavior of Dual Material Gate All Around Stack Architecture of TFET ( DMGAASA TFET) in suppressing short channel effects. A comparative study of the Short Channel Effects for DMGAASA and Single material Gate All Around Stack Architecture of TFET ( SMGAASA TFET) device structures has been carried out. DMGAASA TFET provides better results to prevent SCEs as compared to SMGAASA TFET. The analytical results obtained from the proposed model agree well with the simulated results obtained from TCAD sentaurus device simulator.

引用

页码：294 / 299

页数：6

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