Analytical modeling of capacitances in tunnel-FETs including the effect of Schottky barrier contacts

被引：3

作者：

Farokhnejad, Atieh ^{[1
,2
]}

Schwarz, Mike ^{[1
]}

Horst, Fabian ^{[1
,2
]}

Iniguez, Benjamin ^{[2
]}

Lime, Francois ^{[2
]}

Kloes, Alexander ^{[1
]}

机构：

[1] TH Mittelhessen Univ Appl Sci, NanoP, Wiesenstr 14, D-35390 Giessen, Germany

[2] Univ Rovira & Virgili, DEEEA, Avda Paison Catalans 26,Campus Sescelades, E-43007 Tarragona, Spain

来源：

SOLID-STATE ELECTRONICS | 2019年 / 159卷

关键词：

Tunnel-FET; AC model; Intrinsic capacitances; Schottky barrier; TCAD simulations;

D O I：

10.1016/j.sse.2019.03.062

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a charge-based analytical model for intrinsic capacitances in tunnel field-effect transistors (TFETs) is presented. The model is derived for a Si Double-Gate (DG) n-TFET whose flexibility is applicable to single-gate or p-type TFETs as well. The model is verified comparing with the TCAD simulations as well as measurements data. Considering the capacitances of fabricated Si planar p-TFETs on Ultrathin Body, some deviations between TCAD simulations, compact model and measurements are observed. Here the effect of Schottky barriers at NiSi2 contacts are analyzed and a theory for the reason associated deviations and the unexpected behavior of intrinsic capacitances is evolved. Furthermore, a technique to include this effect in the aforementioned model is also presented.

引用

页码：191 / 196

页数：6

共 12 条

[1] On the Lambert W function [J].

Corless, RM ;

Gonnet, GH ;

Hare, DEG ;

Jeffrey, DJ ;

Knuth, DE .

ADVANCES IN COMPUTATIONAL MATHEMATICS, 1996, 5 (04) :329-359

[2]

del Alamo J., 1985, International Electron Devices Meeting. Technical Digest (Cat. No. 85CH2252-5), P290

[3]

Farokhnejad A, 2017, INT CONF ULTI INTEGR, P140, DOI 10.1109/ULIS.2017.7962584

[4]

Farooq, 2018, 2018 INT C COMP MATH

[5] A compact model for tunnel field-effect transistors incorporating nonlocal band-to-band tunneling [J].

Fukuda, K. ;

Mori, T. ;

Mizubayashi, W. ;

Morita, Y. ;

Tanabe, A. ;

Masahara, M. ;

Yasuda, T. ;

Migita, S. ;

Ota, H. .

JOURNAL OF APPLIED PHYSICS, 2013, 114 (14)

[6]

Horst F, 2016, PROC EUR S-STATE DEV, P456, DOI 10.1109/ESSDERC.2016.7599684

[7] Quantum Confinement and Volume Inversion in MOS3 Model for Short-Channel Tri-Gate MOSFETs [J].

Kloes, Alexander ;

Schwarz, Mike ;

Holtij, Thomas ;

Navas, Andres .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (08) :2691-2694

[8] Experimental I-V(T) and C-V Analysis of Si Planar p-TFETs on Ultrathin Body [J].

Liu, Chang ;

Han, Qinghua ;

Glass, Stefan ;

Luong, Gia Vinh ;

Narimani, Keyvan ;

Tiedemann, Andreas T. ;

Fox, Alfred ;

Yu, Wenjie ;

Wang, Xi ;

Mantl, Siegfried ;

Zhao, Qing-Tai .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2016, 63 (12) :5036-5040

[9] Low-Voltage Tunnel Transistors for Beyond CMOS Logic [J].

Seabaugh, Alan C. ;

Zhang, Qin .

PROCEEDINGS OF THE IEEE, 2010, 98 (12) :2095-2110

[10] MEASUREMENTS OF BANDGAP NARROWING IN SI BIPOLAR-TRANSISTORS [J].

SLOTBOOM, JW ;

DEGRAAFF, HC .

SOLID-STATE ELECTRONICS, 1976, 19 (10) :857-862

← 1 2 →